P

Inventor

SU HUNG-DER

TW58 patents
⚠️ This page may combine multiple inventors who share the name “SU HUNG-DER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TAIWAN SEMICONDUCTOR MFG

25 patents
US6028324AFeb 22, 2000

Test structures for monitoring gate oxide defect densities and the plasma antenna effect

TAIWAN SEMICONDUCTOR MFG191 citations99
US6127227AOct 3, 2000

Thin ONO thickness control and gradual gate oxidation suppression by b. N.su2 treatment in flash memory

TAIWAN SEMICONDUCTOR MFG97 citations98
US6074915AJun 13, 2000

Method of making embedded flash memory with salicide and sac structure

TAIWAN SEMICONDUCTOR MFG146 citations98
US6153494ANov 28, 2000

Method to increase the coupling ratio of word line to floating gate by lateral coupling in stacked-gate flash

TAIWAN SEMICONDUCTOR MFG70 citations96
US6124177ASep 26, 2000

Method for making deep sub-micron mosfet structures having improved electrical characteristics

TAIWAN SEMICONDUCTOR MFG74 citations96
US6037223AMar 14, 2000

Stack gate flash memory cell featuring symmetric self aligned contact structures

TAIWAN SEMICONDUCTOR MFG68 citations96
US6724036B1Apr 20, 2004

Stacked-gate flash memory cell with folding gate and increased coupling ratio

TAIWAN SEMICONDUCTOR MFG40 citations93
US6348382B1Feb 19, 2002

Integration process to increase high voltage breakdown performance

TAIWAN SEMICONDUCTOR MFG29 citations93
US6297098B1Oct 2, 2001

Tilt-angle ion implant to improve junction breakdown in flash memory application

TAIWAN SEMICONDUCTOR MFG38 citations93
US6251744B1Jun 26, 2001

Implant method to improve characteristics of high voltage isolation and high voltage breakdown

TAIWAN SEMICONDUCTOR MFG32 citations93
US6246075B1Jun 12, 2001

Test structures for monitoring gate oxide defect densities and the plasma antenna effect

TAIWAN SEMICONDUCTOR MFG16 citations93
US6130168AOct 10, 2000

Using ONO as hard mask to reduce STI oxide loss on low voltage device in flash or EPROM process

TAIWAN SEMICONDUCTOR MFG47 citations93
US6001687ADec 14, 1999

Process for forming self-aligned source in flash cell using SiN spacer as hard mask

TAIWAN SEMICONDUCTOR MFG31 citations93
US6582995B2Jun 24, 2003

Method for fabricating a shallow ion implanted microelectronic structure

TAIWAN SEMICONDUCTOR MFG22 citations92
US6885214B1Apr 26, 2005

Method for measuring capacitance-voltage curves for transistors

TAIWAN SEMICONDUCTOR MFG24 citations91
US6653709B2Nov 25, 2003

CMOS output circuit with enhanced ESD protection using drain side implantation

TAIWAN SEMICONDUCTOR MFG19 citations91
US6444511B1Sep 3, 2002

CMOS output circuit with enhanced ESD protection using drain side implantation

TAIWAN SEMICONDUCTOR MFG43 citations91
US6261905B1Jul 17, 2001

Flash memory structure with stacking gate formed using damascene-like structure

TAIWAN SEMICONDUCTOR MFG26 citations89
US6765772B2Jul 20, 2004

Electrostatic discharge protection device

TAIWAN SEMICONDUCTOR MFG14 citations84
US6747857B1Jun 8, 2004

Clamping circuit for stacked NMOS ESD protection

TAIWAN SEMICONDUCTOR MFG15 citations84
US6414532B1Jul 2, 2002

Gate ground circuit approach for I/O ESD protection

TAIWAN SEMICONDUCTOR MFG16 citations84
US6190969B1Feb 20, 2001

Method to fabricate a flash memory cell with a planar stacked gate

TAIWAN SEMICONDUCTOR MFG3 citations63
US6828198B2Dec 7, 2004

System-on-chip (SOC) solutions with multiple devices by multiple poly gate trimming process

TAIWAN SEMICONDUCTOR MFG4 citations62
US6495880B2Dec 17, 2002

Method to fabricate a flash memory cell with a planar stacked gate

TAIWAN SEMICONDUCTOR MFG0 citations52
US7678655B2Mar 16, 2010

Spacer layer etch method providing enhanced microelectronic device performance

TAIWAN SEMICONDUCTOR MFG1 citations51

RICHTEK TECHNOLOGY CORP

15 patents
US7132717B2Nov 7, 2006

Power metal oxide semiconductor transistor layout with lower output resistance and high current limit

RICHTEK TECHNOLOGY CORP34 citations92
US7557553B2Jul 7, 2009

Power supply circuit and control method thereof

RICHTEK TECHNOLOGY CORP13 citations84
US7382172B2Jun 3, 2008

Level shift circuit and method for the same

RICHTEK TECHNOLOGY CORP11 citations84
US7327124B2Feb 5, 2008

Control apparatus and method for a boost-inverting converter

RICHTEK TECHNOLOGY CORP19 citations84
US7248084B2Jul 24, 2007

Method for determining switching state of a transistor-based switching device

RICHTEK TECHNOLOGY CORP11 citations82
US7838902B2Nov 23, 2010

Single-chip common-drain JFET device and its applications

RICHTEK TECHNOLOGY CORP1 citations63
US7795855B2Sep 14, 2010

Power management apparatus having an extended safe operation region and operation method thereof

RICHTEK TECHNOLOGY CORP4 citations63
US7535032B2May 19, 2009

Single-chip common-drain JFET device and its applications

RICHTEK TECHNOLOGY CORP1 citations63
US7839197B2Nov 23, 2010

Level shift circuit

RICHTEK TECHNOLOGY CORP5 citations62
US11243181B2Feb 8, 2022

Bio-detection device and manufacturing method thereof

RICHTEK TECHNOLOGY CORP0 citations56
US7838900B2Nov 23, 2010

Single-chip common-drain JFET device and its applications

RICHTEK TECHNOLOGY CORP0 citations52
US7838901B2Nov 23, 2010

Single-chip common-drain JFET device and its applications

RICHTEK TECHNOLOGY CORP0 citations52
US7768033B2Aug 3, 2010

Single-chip common-drain JFET device and its applications

RICHTEK TECHNOLOGY CORP0 citations52
US7759695B2Jul 20, 2010

Single-chip common-drain JFET device and its applications

RICHTEK TECHNOLOGY CORP0 citations52
US7652536B2Jan 26, 2010

Amplifier circuit with internal zeros

RICHTEK TECHNOLOGY CORP0 citations52

YANG CHING-YAO

3 patents

HUANG TSUNG-YI

2 patents

REALTEK SEMICONDUCTOR CORP

2 patents

(unassigned)

1 patent

RICHTEK TECHNOLOGY CORP ROC

1 patent

KAO TZU-CHENG

1 patent

Showing the top 50 of 58 patents by PatentIndex Score.