Inventor

FISCHER PAUL B

US76 patents

Patents

50 patents

US5595526AJan 21, 1997

Method and apparatus for endpoint detection in a chemical/mechanical process for polishing a substrate

INTEL CORP91 citations96

US10797139B2Oct 6, 2020

Planar transistors with wrap-around gates and wrap-around source and drain contacts

INTEL CORP2 citations73

US11557667B2Jan 17, 2023

Group III-nitride devices with improved RF performance and their methods of fabrication

INTEL CORP2 citations73

US11538804B2Dec 27, 2022

Stacked integration of III-N transistors and thin-film transistors

INTEL CORP2 citations73

US11502124B2Nov 15, 2022

Filter-centric III-N films enabling RF filter integration with III-N transistors

INTEL CORP2 citations73

US11393777B2Jul 19, 2022

Microelectronic assemblies

INTEL CORP2 citations73

US11348897B2May 31, 2022

Microelectronic assemblies

INTEL CORP3 citations73

US11335777B2May 17, 2022

Integrated circuit components with substrate cavities

INTEL CORP2 citations73

US11056532B2Jul 6, 2021

Techniques for monolithic co-integration of polycrystalline thin-film bulk acoustic resonator devices and monocrystalline III-N semiconductor transistor devices

INTEL CORP2 citations73

US11043627B2Jun 22, 2021

Techniques for monolithic co-integration of thin-film bulk acoustic resonator devices and III-N semiconductor transistor devices

INTEL CORP5 citations73

US10979012B2Apr 13, 2021

Single-flipped resonator devices with 2DEG bottom electrode

INTEL CORP3 citations73

US10672884B2Jun 2, 2020

Schottky diodes on semipolar planes of group III-N material structures

INTEL CORP2 citations73

US10658475B2May 19, 2020

Transistors with vertically opposed source and drain metal interconnect layers

INTEL CORP2 citations73

US10453679B2Oct 22, 2019

Methods and devices integrating III-N transistor circuitry with Si transistor circuitry

INTEL CORP2 citations73

US10396045B2Aug 27, 2019

Metal on both sides of the transistor integrated with magnetic inductors

INTEL CORP6 citations73

US10490449B2Nov 26, 2019

Techniques for revealing a backside of an integrated circuit device, and associated configurations

INTEL CORP1 citations72

US7105925B2Sep 12, 2006

Differential planarization

INTEL CORP6 citations72

US10720345B1Jul 21, 2020

Wafer to wafer bonding with low wafer distortion

INTEL CORP3 citations69

US9786559B2Oct 10, 2017

Process and material for preventing deleterious expansion of high aspect ratio copper filled through silicon vias (TSVs)

INTEL CORP3 citations69

US12548973B2Feb 10, 2026

Hybrid laser with amorphous bonding layer

INTEL CORP0 citations63

US11671075B2Jun 6, 2023

Film bulk acoustic resonator (FBAR) devices for high frequency RF filters

INTEL CORP0 citations63

US11670637B2Jun 6, 2023

Logic circuit with indium nitride quantum well

INTEL CORP1 citations63

US11558032B2Jan 17, 2023

RF filters and resonators of crystalline III-N films

INTEL CORP0 citations63

US11205717B2Dec 21, 2021

Epitaxially fabricated heterojunction bipolar transistors

INTEL CORP0 citations63

US11145648B2Oct 12, 2021

Enhancement/depletion device pairs and methods of producing the same

INTEL CORP0 citations63

US11056449B2Jul 6, 2021

Guard ring structures and their methods of fabrication

INTEL CORP0 citations63

US11005447B2May 11, 2021

Microelectronic devices having vertical piezoelectric membranes for integrated RF filters

INTEL CORP0 citations63

US10848127B2Nov 24, 2020

Film bulk acoustic resonator (FBAR) RF filter having epitaxial layers

INTEL CORP1 citations63

US10840341B2Nov 17, 2020

Semiconductor devices, radio frequency devices and methods for forming semiconductor devices

INTEL CORP1 citations63

US10673405B2Jun 2, 2020

Film bulk acoustic resonator (FBAR) devices with 2DEG bottom electrode

INTEL CORP1 citations63

US12148757B2Nov 19, 2024

Integration of Si-based transistors with non-Si technologies by semiconductor regrowth over an insulator material

INTEL CORP0 citations62

US12027613B2Jul 2, 2024

III-N transistor arrangements for reducing nonlinearity of off-state capacitance

INTEL CORP0 citations62

US11881511B2Jan 23, 2024

Superlattice FINFET with tunable drive current capability

INTEL CORP1 citations62

US11721649B2Aug 8, 2023

Microelectronic assemblies

INTEL CORP0 citations62

US11715790B2Aug 1, 2023

Charge-induced threshold voltage tuning in III-N transistors

INTEL CORP0 citations62

US11658217B2May 23, 2023

Transistors with ion- or fixed charge-based field plate structures

INTEL CORP0 citations62

US11616014B2Mar 28, 2023

Peripheral inductors

INTEL CORP0 citations62

US11594452B2Feb 28, 2023

Techniques for revealing a backside of an integrated circuit device, and associated configurations

INTEL CORP0 citations62

US11527532B2Dec 13, 2022

Enhancement-depletion cascode arrangements for enhancement mode III-N transistors

INTEL CORP0 citations62

US11450617B2Sep 20, 2022

Transmission line structures for III-N devices

INTEL CORP0 citations62

US11037916B2Jun 15, 2021

Apparatus with multi-wafer based device comprising embedded active devices and method for forming such

INTEL CORP1 citations62

US10896847B2Jan 19, 2021

Techniques for revealing a backside of an integrated circuit device, and associated configurations

INTEL CORP0 citations62

US11581313B2Feb 14, 2023

Integration of III-N transistors and non-III-N transistors by semiconductor regrowth

INTEL CORP0 citations61

US10763248B2Sep 1, 2020

Multi-layer silicon/gallium nitride semiconductor

INTEL CORP1 citations61

Showing the top 50 of 76 patents by PatentIndex Score.

FISCHER PAUL B

Patents

Method and apparatus for endpoint detection in a chemical/mechanical process for polishing a substrate

Methods of forming backside self-aligned vias and structures formed thereby

Fabrication and use of through silicon vias on double sided interconnect device

Fabrication and use of through silicon vias on double sided interconnect device

Methods of forming backside self-aligned vias and structures formed thereby

Integrated voltage regulators with magnetically enhanced inductors

Microelectronic assemblies

Planar transistors with wrap-around gates and wrap-around source and drain contacts

Group III-nitride devices with improved RF performance and their methods of fabrication

Stacked integration of III-N transistors and thin-film transistors

Filter-centric III-N films enabling RF filter integration with III-N transistors

Microelectronic assemblies

Microelectronic assemblies

Integrated circuit components with substrate cavities

Techniques for monolithic co-integration of polycrystalline thin-film bulk acoustic resonator devices and monocrystalline III-N semiconductor transistor devices

Techniques for monolithic co-integration of thin-film bulk acoustic resonator devices and III-N semiconductor transistor devices

Single-flipped resonator devices with 2DEG bottom electrode

Schottky diodes on semipolar planes of group III-N material structures

Transistors with vertically opposed source and drain metal interconnect layers

Methods and devices integrating III-N transistor circuitry with Si transistor circuitry

Metal on both sides of the transistor integrated with magnetic inductors

Techniques for revealing a backside of an integrated circuit device, and associated configurations

Differential planarization

Wafer to wafer bonding with low wafer distortion

Process and material for preventing deleterious expansion of high aspect ratio copper filled through silicon vias (TSVs)

Hybrid laser with amorphous bonding layer

Film bulk acoustic resonator (FBAR) devices for high frequency RF filters

Logic circuit with indium nitride quantum well

RF filters and resonators of crystalline III-N films

Epitaxially fabricated heterojunction bipolar transistors

Enhancement/depletion device pairs and methods of producing the same

Guard ring structures and their methods of fabrication

Microelectronic devices having vertical piezoelectric membranes for integrated RF filters

Film bulk acoustic resonator (FBAR) RF filter having epitaxial layers

Semiconductor devices, radio frequency devices and methods for forming semiconductor devices

Film bulk acoustic resonator (FBAR) devices with 2DEG bottom electrode

Integration of Si-based transistors with non-Si technologies by semiconductor regrowth over an insulator material

III-N transistor arrangements for reducing nonlinearity of off-state capacitance

Superlattice FINFET with tunable drive current capability

Microelectronic assemblies

Charge-induced threshold voltage tuning in III-N transistors

Transistors with ion- or fixed charge-based field plate structures

Peripheral inductors

Techniques for revealing a backside of an integrated circuit device, and associated configurations

Enhancement-depletion cascode arrangements for enhancement mode III-N transistors

Transmission line structures for III-N devices

Apparatus with multi-wafer based device comprising embedded active devices and method for forming such

Techniques for revealing a backside of an integrated circuit device, and associated configurations

Integration of III-N transistors and non-III-N transistors by semiconductor regrowth

Multi-layer silicon/gallium nitride semiconductor