Inventor

DALAL HORMAZDYAR M

US33 patents

⚠️ This page may combine multiple inventors who share the name “DALAL HORMAZDYAR M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DALAL HORMAZDYAR M

IBM

Refractory metal capped low resistivity metal conductor lines and vias formed using PVD and CVD

Refractory metal capped low resistivity metal conductor lines and vias

Refractory metal capped low resistivity metal conductor lines and vias

Multi-level electronic package and method for making same

Method of forming copper interconnections with enhanced electromigration resistance and reduced defect sensitivity

Sub-quarter-micron copper interconnections with improved electromigration resistance and reduced defect sensitivity

Method for providing electrically fusible links in copper interconnection

Method for attaching a flip chip on flexible circuit carrier using chip with metallic cap on solder

Process of forming a capacitor with multi-level interconnection technology

Refractory metal capped low resistivity metal conductor lines and vias

Method for making direct chip attach circuit card

Refractory metal capped low resistivity metal conductor lines and vias formed using PVD and CVD

Refractory metal capped low resistivity metal conductor lines and vias

Self-aligned composite insulator with sub-half-micron multilevel high density electrical interconnections and process thereof

Refractory metal capped low resistivity metal conductor lines and vias

Refractory metal capped low resistivity metal conductor lines and vias

Copper interconnections with enhanced electromigration resistance and reduced defect sensitivity and method of forming same

Method of forming copper interconnections with enhanced electromigration resistance and reduced defect sensitivity

Multilayer capacitor

Method for fabricating tantalum semiconductor contacts

Method of making self-aligned, lateral diffusion barrier in metal lines to eliminate electromigration

Self-aligned composite insulator with sub-half-micron multilevel high density electrical interconnections and process thereof

Sub-quarter-micron copper interconnections with improved electromigration resistance and reduced defect sensitivity

Sub-half-micron multi-level interconnection structure and process thereof

Capacitor with multi-level interconnection technology

Stacked via-stud with improved reliability in copper metallurgy

Process for corrosion free multi-layer metal conductors

Tungsten liner process for simultaneous formation of integral contact studs and interconnect lines

Method for making low barrier Schottky devices of the electron beam evaporation of reactive metals

Tantalum semiconductor contacts and method for fabricating same

Method of metal silicide formation in integrated circuit devices

DALAL HORMAZDYAR M

Method of forming a shielded semiconductor device and structure therefor

Shielded semiconductor device structure