Inventor

SHUKLA PITAMBER

US47 patents

⚠️ This page may combine multiple inventors who share the name “SHUKLA PITAMBER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHUKLA PITAMBER

MICRON TECHNOLOGY INC

Program voltage step based on program-suspend time

Adjusting a preprogram voltage based on use of a memory device

Adjusting a preprogram voltage based on use of a memory device

Setting an initial erase voltage using feedback from previous operations

Dynamic block categorization to improve reliability and performance in memory sub-system

Adaptive background scans in a memory sub-system

Program pulse modification

Determining read voltage offset in memory devices

Managing defective blocks during multi-plane programming operations in memory devices

Determining read voltage offset in memory devices

Memory sub-system for memory cell touch-up

Latent read disturb mitigation in memory devices

Power loss immunity in memory programming operations

Low stress refresh erase in a memory device

Read calibration by sector of memory

Dynamic prioritization of selector VT scans

Temperature-dependent operations in a memory device

Dynamic block categorization to improve reliability and performance in memory sub-system

Memory systems with flexible erase suspend-resume operations, and associated systems, devices, and methods

Memory system failure detection and self recovery of memory dice

Adaptive erase pulse width modulation based on erase suspend during erase pulse ramping period

Memory system failure detection and self recovery of memory dice

Adaptive background scans in a memory sub-system

Charge loss tracking through targeted bit count

Dynamic word line allocation in memory systems

Probabilistic data integrity scans using risk factor estimation

Memory sub-system for memory cell in-field touch-up

Memory operation based on block-associated temperature

System driven pass-through voltage adjustment to improve read disturb in memory devices

Reuse of bad blocks for tasks in a memory sub-system

SANDISK TECHNOLOGIES LLC

Accelerated physical secure erase

Wordline smart tracking verify

Single pulse SLC programming scheme

Adaptive hard and soft bit decoding

System and method for programming non-volatile memory during burst sequential write

Systems and methods for high-performance write operations

Non-volatile memory with fast partial page operation

Non-volatile memory with fast partial page operation

Systems and methods for high-performance write operations

WESTERN DIGITAL TECH INC

Memory failure detection and resource allocation

System handling for first read read disturb

Non-volatile memory and method for power efficient read or verify using lockout control

Boundary word line voltage shift

Relaxed erase parameters for block erasures in non-volatile storage media

SANDISK TECHNOLOGIES INC

Partial block erase for open block reading in non-volatile memory

WESTERN DIGITAL TECHNOLOGIES INC

Recovering data from a faulty memory block in a memory system

MICROCHIP TECH INC

Solid state drive with concurrent read execution and erase execution