P

Inventor

GLEESON MICHAEL J

US18 patents
⚠️ This page may combine multiple inventors who share the name “GLEESON MICHAEL J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ORACLE INT CORP

15 patents
US9292564B2Mar 22, 2016

Mirroring, in memory, data from disk to improve query performance

ORACLE INT CORP47 citations97
US8521788B2Aug 27, 2013

Techniques for maintaining column vectors of relational data within volatile memory

ORACLE INT CORP36 citations97
US8572131B2Oct 29, 2013

Techniques for more efficient usage of memory-to-CPU bandwidth

ORACLE INT CORP32 citations92
US10007691B2Jun 26, 2018

Prioritizing repopulation of in-memory compression units

ORACLE INT CORP8 citations84
US9965501B2May 8, 2018

Techniques for maintaining column vectors of relational data within volatile memory

ORACLE INT CORP5 citations83
US9881048B2Jan 30, 2018

Mirroring, in memory, data from disk to improve query performance

ORACLE INT CORP2 citations73
US10346315B2Jul 9, 2019

Latchless, non-blocking dynamically resizable segmented hash index

ORACLE INT CORP4 citations71
US10229089B2Mar 12, 2019

Efficient hardware instructions for single instruction multiple data processors

ORACLE INT CORP1 citations62
US9201944B2Dec 1, 2015

Techniques for maintaining column vectors of relational data within volatile memory

ORACLE INT CORP1 citations62
US11080204B2Aug 3, 2021

Latchless, non-blocking dynamically resizable segmented hash index

ORACLE INT CORP1 citations61
US10803039B2Oct 13, 2020

Method for efficient primary key based queries using atomic RDMA reads on cache friendly in-memory hash index

ORACLE INT CORP1 citations61
US10120895B2Nov 6, 2018

Mirroring, in memory, data from disk to improve query performance

ORACLE INT CORP0 citations52
US9697174B2Jul 4, 2017

Efficient hardware instructions for processing bit vectors for single instruction multiple data processors

ORACLE INT CORP0 citations51
US9342314B2May 17, 2016

Efficient hardware instructions for single instruction multiple data processors

ORACLE INT CORP0 citations51
US9792117B2Oct 17, 2017

Loading values from a value vector into subregisters of a single instruction multiple data register

ORACLE INT CORP0 citations41

3COM CORP

3 patents