Inventor
CALLAN NEAL
US11 patents
⚠️ This page may combine multiple inventors who share the name “CALLAN NEAL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
LSI LOGIC CORP
5 patentsUS6775818B2Aug 10, 2004
Device parameter and gate performance simulation based on wafer image prediction
LSI LOGIC CORP57 citations93
US6782525B2Aug 24, 2004
Wafer process critical dimension, alignment, and registration analysis simulation tool
LSI LOGIC CORP23 citations90
US7149340B2Dec 12, 2006
Mask defect analysis for both horizontal and vertical processing effects
LSI LOGIC CORP12 citations82
US6864020B1Mar 8, 2005
Chromeless phase shift mask using non-linear optical materials
LSI LOGIC CORP13 citations82
US7376260B2May 20, 2008
Method for post-OPC multi layer overlay quality inspection
LSI LOGIC CORP4 citations53
LSI CORP
5 patentsUS7313508B2Dec 25, 2007
Process window compliant corrections of design layout
LSI CORP13 citations82
US8015540B2Sep 6, 2011
Method and system for reducing inter-layer capacitance in integrated circuits
LSI CORP2 citations61
US7396760B2Jul 8, 2008
Method and system for reducing inter-layer capacitance in integrated circuits
LSI CORP4 citations61
US7270942B2Sep 18, 2007
Optimized mirror design for optical direct write
LSI CORP4 citations61
US7738078B2Jun 15, 2010
Optimized mirror design for optical direct write
LSI CORP0 citations50