Inventor

HE CHEN

CN47 patents

⚠️ This page may combine multiple inventors who share the name “HE CHEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HE CHEN

HE CHEN

Built-in self trim for non-volatile memory reference current

Method for implementing security of non-volatile memory

Non-volatile memory (NVM) with adaptive write operations

Adaptive erase methods for non-volatile memory

Adaptive erase recovery for non-volatile memory (NVM) systems

Non-volatile memory (NVM) with block-size-aware program/erase

Method and apparatus for EEPROM emulation for preventing data loss in the event of a flash block failure

Adaptive write procedures for non-volatile memory

Digital method to obtain the I-V curves of NVM bitcells

Non-volatile memory (NVM) reset sequence with built-in read check

Built-in self trim for non-volatile memory reference current

FREESCALE SEMICONDUCTOR INC

Multi-level voltage adjustment

Electrical erasable programmable memory transconductance testing

Latent slow bit detection for non-volatile memory

Programming a non-volatile memory (NVM) system having error correction code (ECC)

Method and apparatus for stressing a non-volatile memory

Soft program of a non-volatile memory block

Transition fault testing for a non-volatile memory

Erase ramp pulse width control for non-volatile memory

Kernel based cluster fault analysis

MU FUCHEN

Non-volatile memory (NVM) with dynamically adjusted reference current

Dynamic detection method for latent slow-to-erase bit for high performance and high reliability flash memory

Extended protection for embedded erase of non-volatile memory cells

Dynamic healing of non-volatile memory cells

Methods and systems for adjusting NVM cell bias conditions for program/erase operations to reduce performance degradation

Erasing a non-volatile memory (NVM) system having error correction code (ECC)

Test flow to detect a latent leaky bit of a non-volatile memory

EGUCHI RICHARD K

Temperature-based adaptive erase or program parallelism

Adaptive write procedures for non-volatile memory using verify read

Non-volatile memory (NVM) with imminent error prediction

Non-volatile memory (NVM) erase operation with brownout recovery technique

Stress-based techniques for detecting an imminent read failure in a non-volatile memory array

Non-volatile memory (NVM) with imminent error prediction

ERICSSON TELEFON AB L M

Balun and method for manufacturing the same

Radio frequency power amplifier with harmonic control circuit as well as method for manufacturing the same

Apparatus and method for transmission system

Method and apparatus for envelope shaping of multi-carrier signal in envelope tracking transmission

UNIV NORTHWESTERN

Control of the electrostatic potential of nanoparticles

Control of the electrostatic potential of nanoparticles

ORACLE INT CORP

System and method for a distributed keystore

System and method for a distributed keystore

VALEO SIEMENS EAUTOMOTIVE SHENZHEN CO LTD

Resonant tank circuit and method for configuring resonant tank circuit

UNIV OF SHANGHAI FOR SCIENCE AND TECHNOLOGY

Wearable multifunctional powered exoskeleton for cervical vertebra rehabilitation

BEIJING BAIDU NETCOM SCI & TECH CO LTD

Locating element detection method, device and medium

AEROSPACE RESEARCH INSTITUTE OF MATERIALS & PROCESSING TECH

Silicone rubber and phenolic modified silicone rubber and methods for preparing the same

CHOY JON S

Method for programming a multi-state non-volatile memory (NVM)

UNIV SHANGHAI JIAOTONG

Monotonic optimization method for achieving the maximum weighted sum-rate in multicell downlink MISO systems