Inventor
UEKI KATSUHIKO
JP35 patents
⚠️ This page may combine multiple inventors who share the name “UEKI KATSUHIKO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TOSHIBA MEMORY CORP
18 patentsUS10402097B2Sep 3, 2019
Memory system and information processing system utilizing space information
TOSHIBA MEMORY CORP2 citations73
US9857984B2Jan 2, 2018
Memory system with garbage collection
TOSHIBA MEMORY CORP2 citations73
US9836108B2Dec 5, 2017
Memory system and controller
TOSHIBA MEMORY CORP2 citations73
US10915266B2Feb 9, 2021
Storage device
TOSHIBA MEMORY CORP2 citations72
US10365834B2Jul 30, 2019
Memory system controlling interleaving write to memory chips
TOSHIBA MEMORY CORP1 citations62
US10261857B2Apr 16, 2019
Memory system and method for controlling code rate for data to be stored
TOSHIBA MEMORY CORP1 citations62
US10853233B2Dec 1, 2020
Reconstruction of address mapping in a host of a storage system
TOSHIBA MEMORY CORP1 citations60
US10324788B2Jun 18, 2019
Memory system
TOSHIBA MEMORY CORP1 citations60
US10768679B2Sep 8, 2020
Memory system and controller
TOSHIBA MEMORY CORP0 citations52
US10268251B2Apr 23, 2019
Memory system and controller
TOSHIBA MEMORY CORP0 citations52
US10095410B2Oct 9, 2018
Memory system with garbage collection
TOSHIBA MEMORY CORP0 citations52
US9846552B2Dec 19, 2017
Memory device and storage system having the same
TOSHIBA MEMORY CORP0 citations52
US10789125B2Sep 29, 2020
Memory system and method
TOSHIBA MEMORY CORP0 citations51
US10347353B2Jul 9, 2019
Memory system
TOSHIBA MEMORY CORP0 citations50
US9928138B2Mar 27, 2018
Memory system
TOSHIBA MEMORY CORP0 citations50
US10747449B2Aug 18, 2020
Reduction of power use during address translation via selective refresh operations
TOSHIBA MEMORY CORP0 citations41
US10042575B2Aug 7, 2018
Memory system including a battery powered buffer with a storage capacity of that buffer dependent on the voltage level of the battery
TOSHIBA MEMORY CORP0 citations41
US10410738B2Sep 10, 2019
Memory system and control method
TOSHIBA MEMORY CORP0 citations39
TOSHIBA KK
12 patentsUS6345383B1Feb 5, 2002
Debugging support device and debugging support method
TOSHIBA KK88 citations98
US5845125ADec 1, 1998
Debugger using class information and dynamic instance inter-relationships
TOSHIBA KK65 citations95
US9685242B2Jun 20, 2017
Memory system
TOSHIBA KK26 citations92
US6301602B1Oct 9, 2001
Priority information display system
TOSHIBA KK30 citations92
US5428618AJun 27, 1995
Debugger apparatus and method having an event history recording capability
TOSHIBA KK48 citations92
US7089536B2Aug 8, 2006
Computer system and method for aiding log base debugging
TOSHIBA KK20 citations90
US6865508B2Mar 8, 2005
Log analysis method and recording medium storing log analysis program
TOSHIBA KK44 citations89
US9711240B2Jul 18, 2017
Memory system
TOSHIBA KK4 citations71
US6131109AOct 10, 2000
Multitask processor, a multitask processing method, a multitask processing display method and a storage medium for processing by correlating task and object
TOSHIBA KK12 citations69
US7050942B2May 23, 2006
Object state classification method and system, and program therefor
TOSHIBA KK4 citations61
US9569117B2Feb 14, 2017
Memory system controlling interleaving write to memory chips
TOSHIBA KK0 citations52
US9443617B2Sep 13, 2016
Memory system and method of controlling memory system
TOSHIBA KK0 citations52
KIOXIA CORP
5 patentsUS11435799B2Sep 6, 2022
Memory system and controller
KIOXIA CORP2 citations73
US11947400B2Apr 2, 2024
Memory system and controller
KIOXIA CORP0 citations62
US11693463B2Jul 4, 2023
Memory system and controller
KIOXIA CORP0 citations62
US11581052B2Feb 14, 2023
Memory system and method
KIOXIA CORP0 citations61
US11301373B2Apr 12, 2022
Reconstruction of address mapping in a host of a storage system
KIOXIA CORP0 citations60