P

Inventor

BEATTIE BRUCE

US15 patents

Patents

15 patents
US6087236AJul 11, 2000

Integrated circuit with multiple gate dielectric structures

INTEL CORP94 citations98
US6124171ASep 26, 2000

Method of forming gate oxide having dual thickness by oxidation process

INTEL CORP86 citations94
US6597046B1Jul 22, 2003

Integrated circuit with multiple gate dielectric structures

INTEL CORP38 citations92
US6465358B1Oct 15, 2002

Post etch clean sequence for making a semiconductor device

INTEL CORP47 citations92
US11342411B2May 24, 2022

Cavity spacer for nanowire transistors

INTEL CORP7 citations84
US11205715B2Dec 21, 2021

Self-aligned nanowire

INTEL CORP2 citations73
US11929396B2Mar 12, 2024

Cavity spacer for nanowire transistors

INTEL CORP2 citations72
US11869891B2Jan 9, 2024

Non-planar integrated circuit structures having mitigated source or drain etch from replacement gate process

INTEL CORP2 citations71
US11894368B2Feb 6, 2024

Gate-all-around integrated circuit structures fabricated using alternate etch selective material

INTEL CORP1 citations62
US11715787B2Aug 1, 2023

Self-aligned nanowire

INTEL CORP0 citations62
US12328905B2Jun 10, 2025

Cavity spacer for nanowire transistors

INTEL CORP0 citations61
US12302632B2May 13, 2025

Non-planar integrated circuit structures having mitigated source or drain etch from replacement gate process

INTEL CORP0 citations61
US12453115B2Oct 21, 2025

Nanowire transistor structure and method of shaping

INTEL CORP0 citations59
US11869973B2Jan 9, 2024

Nanowire transistor structure and method of shaping

INTEL CORP0 citations59
US11276691B2Mar 15, 2022

Gate-all-around integrated circuit structures having self-aligned source or drain undercut for varied widths

INTEL CORP0 citations52