Inventor

WU CHUNG-WEI

TW54 patents

⚠️ This page may combine multiple inventors who share the name “WU CHUNG-WEI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WU CHUNG-WEI

TAIWAN SEMICONDUCTOR MFG CO LTD

Semiconductor devices and methods of fabrication thereof

Gate all around transistor device and fabrication methods thereof

Method of manufacturing a source/drain feature in a multi-gate semiconductor structure

Semiconductor device and manufacturing method thereof

Structure and method of integrated circuit having decouple capacitance

System and method for performing extreme ultraviolet photolithography processes

System and method for performing extreme ultraviolet photolithography processes

Air-replaced spacer for self-aligned contact scheme

Effective work function tuning via silicide induced interface dipole modulation for metal gates

Effective work function tuning via silicide induced interface dipole modulation for metal gates

Source/drain silicide for multigate device performance and method of fabricating thereof

Semiconductor devices and methods of fabrication thereof

Source/drain silicide for multigate device performance and method of fabricating thereof

Semiconductor device and manufacturing method thereof

Multi-gate devices and fabricating the same with etch rate modulation

Semiconductor memory device and manufacturing method thereof

Source/drain features with improved strain properties

Source/drain features with improved strain properties

Method of manufacturing a multi-gate device having a semiconductor seed layer embedded in an isolation layer

Semiconductor memory devices and methods of manufacturing thereof

System and method for performing extreme ultraviolet photolithography processes

Semiconductor device structure incorporating air gap

Air-replaced spacer for self-aligned contact scheme

Semiconductor devices and methods of fabrication thereof

Multi-gate devices having a semiconductor layer between an inner spacer and an epitaxial feature

Multi-gate devices and fabricating the same with etch rate modulation

Semiconductor device with improved source and drain contact area and methods of fabrication thereof

Structure and method of integrated circuit having decouple capacitance

Semiconductor memory device and manufacturing method thereof

Semiconductor memory devices and methods of manufacturing thereof

Semiconductor device structure incorporating air gap

Semiconductor device with improved source and drain contact area and methods of fabrication thereof

Multi-gate devices and fabricating the same with etch rate modulation

Semiconductor device and method for forming the same

Ferroelectric memory device and method of forming the same

Effective work function tuning via silicide induced interface dipole modulation for metal gates

Multi-gate devices with multi-layer inner spacers and fabrication methods thereof

Field effect transistor with merged epitaxy backside cut and method

Multi-gate devices with multi-layer inner spacers and fabrication methods thereof

Semiconductor structures and methods thereof

Gate all around transistor device and fabrication methods thereof

3D memory device with modulated doped channel

Semiconductor device having nanosheet transistor and methods of fabrication thereof

Ferroelectric memory device with carrier structures

ASUSTEK COMP INC

Mobile phone

Smartphone with slidable display

Electronic device

LITE ON TECHNOLOGY CORP

Recordable projector

System for positioning staff in office

CHIUN MAI COMMUNICATION SYSTEMS INC

Method and system for object identification