Inventor

LAI CHIH-YU

TW49 patents

⚠️ This page may combine multiple inventors who share the name “LAI CHIH-YU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LAI CHIH-YU

TAIWAN SEMICONDUCTOR MFG CO LTD

Deep trench isolation structures and methods of forming same

Image device having multi-layered refractive layer on back surface

Stacked capacitor with enhanced capacitance and method of manufacturing the same

Deep trench isolations and methods of forming the same

Backside illuminated image sensor with negatively charged layer

Deep trench isolation shrinkage method for enhanced device performance

High dielectric constant structure for the vertical transfer gates of a complementary metal-oxide semiconductor (CMOS) image sensor

Deep trench isolation shrinkage method for enhanced device performance

Photodiode gate dielectric protection layer

Photodiode gate dielectric protection layer

Method for forming alignment marks and structure of same

Mechanisms for forming image sensor device

Method of forming semiconductor device having segmented interconnect

Method of manufacturing integrated circuit

Semiconductor device segmented interconnect

Integrated circuit conductive line arrangement for circuit structures, and method

Backside illuminated image sensor with negatively charged layer

Method for forming alignment marks and structure of same

Semiconductor cell and active area arrangement

Method of making amphi-FET structure and method of designing

Arrangement of source or drain conductors of transistor

Method of making semiconductor device having self-aligned interconnect structure

Deep trench isolations and methods of forming the same

Image sensor having stacked metal oxide films as fixed charge film

Source/drain isolation structure, layout, and method

Method of making amphi-FET structure and method of designing

Arrangement of source or drain conductors of transistor

Semiconductor device having self-aligned interconnect structure and method of making

Amphi-FET structure, method of making and method of designing

Deep trench isolations and methods of forming the same

Image sensor having stacked conformal films

Deep trench isolation shrinkage method for enhanced device performance

Integrated circuit and method of forming same

Integrated circuits having stacked transistors and backside power nodes

Photodiode gate dielectric protection layer

Stacked capacitor with enhanced capacitance

Photodiode gate dielectric protection layer

Photodiode gate dielectric protection layer

Semiconductor device and method of making

First metal structure, layout, and method

TAIWAN SEMICONDUCTOR MFG

Method of reducing delamination in the fabrication of small-pitch devices

Image sensor trench isolation with conformal doping

Method for forming alignment marks and structure of same

Semiconductor device with compressive layers

LAI CHIH-YU

Image sensor trench isolation with conformal doping

Method of reducing delamination in the fabrication of small-pitch devices

Backside surface treatment of semiconductor chips

FON CHIN IND CO LTD

Coupling mechanism interposed between a seat and a back of a chair to prevent a reclining motion of the back from tilting the seat

TSAO CHUN-HAN

Image sensor having compressive layers