Inventor

LINSTADT JOHN ERIC

US156 patents

⚠️ This page may combine multiple inventors who share the name “LINSTADT JOHN ERIC”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LINSTADT JOHN ERIC

RAMBUS INC

Memory module register access

Memory component for deployment in a dynamic stripe width memory system

Memory module with dynamic stripe width

Variable width memory module supporting enhanced error detection and correction

Dual-domain memory

Data-buffer component with variable-width data ranks and configurable data-rank timing

Memory module with emulated memory device population

Variable width memory module supporting enhanced error detection and correction

Memory component with input/output data rate alignment

Memory modules and systems with variable-width data ranks and configurable data-rank timing

Energy-efficient error-correction-detection storage

Low power logic circuitry

Adjustable access energy and access latency memory system and devices

Variable width memory module supporting enhanced error detection and correction

Dynamic random access memory (DRAM) component for high-performance, high-capacity registered memory modules

Extended capacity memory module with dynamic data buffers

Memory module supporting time-division memory access

Memory controller and method of data bus inversion using an error detection correction code

Extended capacity memory module with dynamic data buffers

Local internal discovery and configuration of individually selected and jointly selected devices

Energy efficient storage of error-correction-detection information

Energy efficient storage of error-correction-detection information

Conditional-reset, temporally oversampled image sensor

Memory component with input/output data rate alignment

Memory component for deployment in a dynamic stripe width memory system

Memory system with multiple open rows per bank

High-performance, high-capacity memory systems and modules

Memory system with error detection

Command/address channel error detection

Memory module register access

Command/address channel error detection

Memory module with dedicated repair devices

Floating body DRAM with reduced access energy

Dual-domain combinational logic circuitry

Dynamic random access memory (DRAM) component for high-performance, high-capacity registered memory modules

Low power logic circuitry

Multi-mode memory module and memory component

Controlling a dynamic-stripe-width memory module

Domain-distributed cryogenic signaling amplifier

Memories and memory components with interconnected and redundant data interfaces

Bidirectional signaling with asymmetric termination

Differential cryogenic transmitter

Multiple memory rank system and selection method thereof

Content addressable memory

Buffer circuit with adaptive repair capability

Buffer circuit with adaptive repair capability

Reconfigurable memory controller

Memory controller partitioning for hybrid memory system

WARE FREDERICK A

Reconfigurable memory controller

LINSTADT JOHN ERIC

Variable code rate transmission