Inventor

SUNG JANMYE

TW34 patents

⚠️ This page may combine multiple inventors who share the name “SUNG JANMYE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SUNG JANMYE

VANGUARD INT SEMICONDUCT CORP

Method of fabricating a buried reservoir capacitor structure for high-density dynamic random access memory (DRAM) circuits

Process for fabricating a high performance logic and embedded dram devices on a single semiconductor chip

Method for fabricating capacitor-over-bit-line dynamic random access memory (DRAM) using self-aligned contact etching technology

Method for fabricating low resistance bit line structures, along with bit line structures exhibiting low bit line to bit line coupling capacitance

Reduced mask DRAM process

method for fabricating an embedded vertical bipolar transistor and a memory cell

Method to fabricate a DRAM cell with an area equal to five times the minimum used feature, squared

Method for forming a capacitor with a multiple pillar structure

Capacitor over bit line structure using a straight bit line shape

Design and a novel process for formation of DRAM bit line and capacitor node contacts

Method of forming a low cost DRAM cell with self aligned twin tub CMOS devices and a pillar shaped capacitor

Dram cell capacitor fabrication method

Memory cell array with a self-aligned, buried bit line

Low cycle time CMOS process

Capacitor over bit line structure using a straight bit line shape

Method of fabricating a self aligned contact for a capacitor over bitline, (COB), memory cell

Method fabricating a DRAM cell with an area equal to four times the used minimum feature

Reduced mask DRAM process

Low cycle time CMOS process

AT & T BELL LAB

Fet with gate spacer

Memory integrated circuit with balanced resistance

Integrated-circuit device isolation

Making silicide gate level runners

Metallization processing

Method of fabricating an integrated circuit with lines of critical width extending in the astigmatically preferred direction of the lithographic tool

Integrated circuit

LUCENT TECHNOLOGIES INC

FET with gate spacer

Inductor for high frequency circuits

Method for forming self aligned polysilicon contact

Method for manufacturing gate oxide capacitors including wafer backside dielectric and implantation electron flood gun current control

AT & T CORP

Method for integrated circuit device isolation

Memory integrated circuit

Process for manufacturing semiconductor BICMOS device

VANGAURD INTERNATIONAL SEMICON

Method for fabrication of a one gigabit capacitor over bit line DRAM cell with an area equal to eight times the used minimum feature