Inventor
WHITE BRYAN R
US19 patents
⚠️ This page may combine multiple inventors who share the name “WHITE BRYAN R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
16 patentsUS6859208B1Feb 22, 2005
Shared translation address caching
INTEL CORP49 citations95
US6230228B1May 8, 2001
Efficient bridge architecture for handling multiple write transactions simultaneously
INTEL CORP38 citations91
US6734862B1May 11, 2004
Memory controller hub
INTEL CORP33 citations89
US10482562B2Nov 19, 2019
Graphics engine partitioning mechanism
INTEL CORP8 citations84
US7861024B2Dec 28, 2010
Providing a set aside mechanism for posted interrupt transactions
INTEL CORP9 citations83
US7269756B2Sep 11, 2007
Customizable event creation logic for hardware monitoring
INTEL CORP13 citations80
US11157431B2Oct 26, 2021
System, apparatus and method for multi-die distributed memory mapped input/output support
INTEL CORP3 citations73
US11341600B2May 24, 2022
Graphics engine partitioning mechanism
INTEL CORP0 citations62
US11514550B2Nov 29, 2022
Apparatus and method for display virtualization using mapping between virtual and physical display planes
INTEL CORP0 citations60
US10678623B2Jun 9, 2020
Error reporting and handling using a common error handler
INTEL CORP1 citations59
US10908939B2Feb 2, 2021
Efficient fine grained processing of graphics workloads in a virtualized environment
INTEL CORP0 citations52
US10831483B1Nov 10, 2020
Memory mapped virtual doorbell mechanism
INTEL CORP0 citations52
US8386668B2Feb 26, 2013
Querying a device for information
INTEL CORP0 citations51
US7145568B2Dec 5, 2006
Shared translation address caching
INTEL CORP0 citations51
US10706493B2Jul 7, 2020
Apparatus and method for display virtualization using mapping between virtual and physical display planes
INTEL CORP0 citations49
US9886934B2Feb 6, 2018
Ordering mechanism for offload graphics scheduling
INTEL CORP0 citations42