Inventor

NOWELL SHANE

US84 patents

⚠️ This page may combine multiple inventors who share the name “NOWELL SHANE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

NOWELL SHANE

MICRON TECHNOLOGY INC

Read disturb scan consolidation

Voltage bin selection for blocks of a memory device after power up of the memory device

Smart sampling for block family scan

Managing bin placement for block families of a memory device based on trigger metric values

Reliability scan assisted voltage bin selection

Block family combination and voltage bin selection

Operating temperature management of a memory sub-system

Voltage offset bin selection by die group for memory devices

Adjusting a parameter for a programming operation based on the temperature of a memory system

Block family-based error avoidance for memory devices

Voltage bin selection for blocks of a memory device after power up of the memory device

Managing voltage bin selection for blocks of a memory device

Multi-tier threshold voltage offset bin calibration

Managing error-handling flows in memory devices

Error-handling flows in memory devices based on bins

Voltage calibration scans to reduce memory device overhead

Multi-tier threshold voltage offset bin calibration

Error avoidance based on voltage distribution parameters of block families

Voltage bin calibration based on a temporary voltage shift offset

Block family-based error avoidance for memory devices

Extended cross-temperature handling in a memory sub-system

Temperature compensation in a memory system

Block family-based error avoidance for memory devices

Combination scan management for block families of a memory device

Managing voltage bin selection for blocks of a memory device

Error avoidance based on voltage distribution parameters of block families

Providing recovered data to a new memory cell at a memory sub-system based on an unsuccessful error correction operation

Combining sets of memory blocks in a memory device

Managing bin placement for block families of a memory device based on trigger metric valves

Operating temperature management of a memory sub-system

Voltage offset bin selection by die group for memory devices

Determining voltage offsets for memory read operations

Voltage based combining of block families for memory devices

Block family combination and voltage bin selection

Reliability scan assisted voltage bin selection

Time-based combining for block families of a memory device

Smart sampling for block family scan

Extended cross-temperature handling in a memory sub-system

Mitigating a voltage condition of a memory cell in a memory sub-system

Managing read level voltage offsets for low threshold voltage offset bin placements

Charge loss scan operation management in memory devices

Threshold voltage determination for calibrating voltage bins of a memory device

IOMEGA CORP

Data cartridge with compression return spring following arcuate guide

Caddy for cartridge and disk drive accomodating a caddy

Shutter shell encapsulating disk medium

Disk cartridge with shutter opening arm alignment surface and retraction slot

Miniature memory cartridge

Computer disk cartridge

Data cartridge having arcuate shutter spring

Removable computer disk cartridge