Inventor

OWENS ALEXANDER H

US22 patents

⚠️ This page may combine multiple inventors who share the name “OWENS ALEXANDER H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

OWENS ALEXANDER H

NAT SEMICONDUCTOR CORP

Modified recessed locos isolation process for deep sub-micron device processes

Electrical die contact structure and fabrication method

LDMOS transistor structure for improving hot carrier reliability

Method for improved mobility using hybrid orientation technology (HOT) in conjunction with selective epitaxy and related apparatus

Electrical die contact structure and fabrication method

Method of using trenching techniques to make a transistor with a floating gate

LSI LOGIC CORP

Multilevel gate array integrated circuit structure with perpendicular access to all active device regions

High density CMOS integrated circuit with heat transfer structure for improved cooling

High-temperature bias anneal of integrated circuits for improved radiation hardness and hot electron resistance

Method of forming an MOS-type integrated circuit structure with a diode formed in the substrate under a polysilicon gate electrode to conserve space

Integrated circuit structure including CMOS devices protected by patterned nitride passivation and method for the fabrication thereof

SPRAGUE ELECTRIC CO

Method for making a vertical power DMOS transistor with small signal bipolar transistors

Memory device with interconnected polysilicon layers and method for making

Memory device with interconnected polysilicon layers and method for making

SOLID STATE SCIENT

Method for making a self-aligned CMOS EPROM wherein the EPROM floating gate and CMOS gates are made from one polysilicon layer

Method of making a CMOS EPROM with independently selectable thresholds

Method for double doping sources and drains in an EPROM

ALLEGRO MICROSYSTEMS INC

Method for making an NPN transistor with controlled base width compatible with making a Bi-MOS integrated circuit

Method of making integrated circuit with high current transistor and CMOS transistors

LSI LOGIC

Radiation hardened CMOS structure using an implanted P guard structure and method for the manufacture thereof

OWENS ALEXANDER H

Method for using hybrid orientation technology (HOT) in conjunction with selective epitaxy to form semiconductor devices with regions of different electron and hole mobilities and related apparatus

CYPRESS SEMICONDUCTOR CORP

Method of forming local oxidation with sloped silicon recess