Inventor
CHAUHAN VIKRANT
US13 patents
⚠️ This page may combine multiple inventors who share the name “CHAUHAN VIKRANT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
GLOBALFOUNDRIES INC
10 patentsUS8856715B1Oct 7, 2014
Capacitor designs for integrated circuits utilizing self-aligned double patterning (SADP)
GLOBALFOUNDRIES INC8 citations83
US10347543B2Jul 9, 2019
FDSOI semiconductor device with contact enhancement layer and method of manufacturing
GLOBALFOUNDRIES INC4 citations72
US9465907B2Oct 11, 2016
Multi-polygon constraint decomposition techniques for use in double patterning applications
GLOBALFOUNDRIES INC3 citations70
US10199270B2Feb 5, 2019
Multi-directional self-aligned multiple patterning
GLOBALFOUNDRIES INC5 citations68
US9412655B1Aug 9, 2016
Forming merged lines in a metallization layer by replacing sacrificial lines with conductive lines
GLOBALFOUNDRIES INC2 citations62
US10311186B2Jun 4, 2019
Three-dimensional pattern risk scoring
GLOBALFOUNDRIES INC0 citations49
US10790204B2Sep 29, 2020
Test structure leveraging the lowest metallization level of an interconnect structure
GLOBALFOUNDRIES INC0 citations47
US10078107B2Sep 18, 2018
Wafer level electrical test for optical proximity correction and/or etch bias
GLOBALFOUNDRIES INC0 citations46
US10147783B2Dec 4, 2018
On-chip capacitors with floating islands
GLOBALFOUNDRIES INC0 citations39
US10796973B2Oct 6, 2020
Test structures connected with the lowest metallization levels in an interconnect structure
GLOBALFOUNDRIES INC0 citations36