Inventor

CHEN SHUN LI

TW52 patents

⚠️ This page may combine multiple inventors who share the name “CHEN SHUN LI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHEN SHUN LI

TAIWAN SEMICONDUCTOR MFG CO LTD

Integrated circuit and method of forming an integrated circuit

Integrated circuit and method of forming an integrated circuit

Cell structure with intermediate metal layers for power supplies

Integrated circuit and method of manufacturing same

Engineering change order cell structure having always-on transistor

Method of manufacturing conductors and semiconductor device which includes conductors

Method of generating engineering change order (ECO) layout of base cell and computer-readable medium comprising executable instructions for carrying out said method

Semiconductor device including source/drain contact having height below gate stack

Semiconductor device including source/drain contact having height below gate stack

Integrated circuit and method of forming an integrated circuit

Cell structure with intermediate metal layers for power supplies

Integrated circuit structure

Method and system of manufacturing conductors and semiconductor device which includes conductors

Semiconductor device including source/drain contact having height below gate stack

Engineering change order cell structure having always-on transistor

Semiconductor device including power-grid-adapted route-spacing and method for generating layout diagram of same

Method and system of manufacturing conductors and semiconductor device which includes conductors

Semiconductor device including source/drain contact having height below gate stack

Integrated circuit and method of manufacturing same

Method and system for pin layout

Masks based on gate pad layout patterns of standard cell having different gate pad pitches

Circuit with combined cells and method for manufacturing the same

Semiconductor device and layout method thereof

Semiconductor device including source/drain contact having height below gate stack

Integrated circuit structure

Cell structure with intermediate metal layers for power supplies

Semiconductor device having fin structure

Non-transitory computer-readable medium, integrated circuit device and method

Semiconductor device having fin structure

Integrated circuit and method of manufacturing same

Advanced metal connection with metal cut

Integrated circuit device and method

Interconnect structure in semiconductor device and method of forming the same

Method for generating a layout diagram of a semiconductor device including power-grid- adapted route-spacing

Method of manufacturing conductors for semiconductor device

Standard and engineering change order (ECO) cell regions and semiconductor device including the same

Method for manufacturing standard cell regions and engineering change order (ECO) cell regions

Engineering change order cell structure having always-on transistor

System for generating standard cell layout having engineering change order (ECO) cells

Method and system for pin layout

Integrated circuit and method of forming the same

Semiconductor device having fin structure

Advanced metal connection with metal cut

Semiconductor device having engineering change order (ECO) cells

Advanced metal connection with metal cut

Semiconductor device layout

Advanced metal connection with metal cut

Gate pad layout patterns for masks and structures

Filler cell region with centrally uncut gate segments, semiconductor device including same and method of manufacturing same

LU LEE-CHUNG

Voltage level shifter with single well voltage