Inventor

SALTER III ROBERT M

US19 patents

⚠️ This page may combine multiple inventors who share the name “SALTER III ROBERT M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SALTER III ROBERT M

ACTEL CORP

Non-volatile memory cells in a field programmable gate array

Programming method for non-volatile memory and non-volatile memory-based programmable logic device

Volatile data storage in a non-volatile memory cell array

Nonvolatile reprogrammable interconnect cell with FN tunneling device for programming and erase

Programming method for non-volatile memory and non-volatile memory-based programmable logic device

Method for erasing programmable interconnect cells for field programmable gate arrays using reverse bias voltage

Volatile data storage in a non-volatile memory cell array

NAT SEMICONDUCTOR CORP

Multiple chip package processor having feed through paths on one die

Non-volatile memory control and data loading architecture for multiple chip processor

Multiple chip processor architecture with memory interface control register for in-system programming

In-system programming architecture for a multiple chip processor

Multiple chip processor architecture with reset intercept circuit

Column selector circuit for shared column CMOS EPROM

GATEFIELD CORP

Nonvolatile reprogrammable interconnect cell with FN tunneling in sense

Nonvolatile reprogrammable interconnect cell with programmable buried bitline

Nonvolatile reprogrammable interconnect cell with programmable buried source/drain in sense transistor

ZYCAD CORP

Floating gate FGPA cell with separated select device

SALTER III ROBERT M

Apparatus and methods for a tamper resistant bus for secure lock bit transfer

NUENERCHI INC

Electrical stimulation device for applying frequency and peak voltage having inverse relationship