Inventor

HUBER BRIAN W

US55 patents

⚠️ This page may combine multiple inventors who share the name “HUBER BRIAN W”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HUBER BRIAN W

MICRON TECHNOLOGY INC

Junction-isolated depletion mode ferroelectric memory

Junction-isolated depletion mode ferroelectric memory devices

Differential amplifier common mode noise compensation

Data-pattern-dependent compensation technique to maintain drive strength of an output driver

Fast accessing of a memory device

Sharing signal lines in a memory device

Differential amplifiers with increased input ranges

Method and apparatus for phase-splitting a clock signal

On-die termination apparatuses and methods

Junction-isolated depletion mode ferroelectric memory devices

Voltage regulator and data path for a memory device

Multiplexed noisy-quiet power busing for improved area efficiencies and pause performance in DRAM memories

Voltage regulator and data path for a memory device

Junction-isolated depletion mode ferroelectric memory devices

Junction-isolated depletion mode ferroelectric memory devices

Junction-isolated depletion mode ferroelectric memory devices

Junction-isolated depletion mode ferroelectric memory devices

Junction-isolated depletion mode ferroelectric memory devices

Methods of writing junction-isolated depletion mode ferroelectric memory devices

Methods of reading junction-isolated depletion mode ferroelectric memory devices

Method of scaling digital circuits and controlling the timing relationship between digital circuits

Circuit configuration for controlling signal propagation in fabricated devices

Pump area reduction through the use of passive RC-filters or active filters

Method and system for controlling the slew rate of signals generated by open drain driver circuits

Voltage adjustment based on pending refresh operations

Row clear features for memory devices and associated methods and systems

Power amplifier having a spread of graded outputs

Gate coupled voltage support for an output driver circuit

Synchronous input buffer control using a ripple counter

Integrated circuit memory operation apparatus and methods

Circuit and method for reducing noise interference in digital differential input receivers

Circuit and method for reducing noise interference in digital differential input receivers

Voltage regulator and data path for a memory device

Amplifiers with variable swing control

Fast accessing of a memory device using decoded address during setup time

Voltage regulator and data path for a memory device

Circuit configuration for enhancing performance characteristics of fabricated devices

Voltage regulator and data path for a memory device

Technique for locally reducing effects on an analog signal due to changes on a reference bus in an integrated circuit

Circuit configuration for enhancing performance characteristics of fabricated devices

Voltage regulator and data path for a memory device

Voltage adjustment based on pending refresh operations

Gate coupled voltage support for an output driver circuit

Gate coupled voltage support for an output driver circuit

Junction-isolated depletion mode ferroelectric memory devices and systems

Junction-isolated depletion mode ferroelectric memory devices and systems

TEXAS INSTRUMENTS INC

Leakage tolerant sense amplifier

Nonvolatile memory device having program and/or erase voltage clamp

LODESTAR LICENSING GROUP LLC

Row clear features for memory devices and associated methods and systems

Row clear features for memory devices and associated methods and systems