Inventor

LEE KIJUN

KR61 patents

⚠️ This page may combine multiple inventors who share the name “LEE KIJUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LEE KIJUN

SAMSUNG ELECTRONICS CO LTD

Memory device performing refresh operation and method of operating the same

Semiconductor memory devices and memory systems with enhanced error detection and correction

Memory controllers and memory systems including the same

Memory controllers, memory systems and memory modules

Semiconductor memory devices and memory systems

Error correction circuit of semiconductor memory device and semiconductor memory device

Controllers that generate output bits for storage in non-volatile memory devices by puncturing code word bits and methods for operating the same

Operating method of controller controlling nonvolatile memory device and mapping pattern selecting method of selecting mapping pattern mapping polar coded code word with multi bit data of nonvolatile memory device

Memory device and refresh method thereof

Error correction circuit, memory system, and error correction method

Memory systems having memory devices therein with enhanced error correction capability and methods of operating same

Memory controller and memory system including the same

Semiconductor memory devices and memory systems

Semiconductor memory devices

Controller for preventing uncorrectable error in memory device, memory device having the same, and operating method thereof

Memory controllers and memory systems including the same

Semiconductor memory devices and methods of operating semiconductor memory devices

Error correction device, operating method of error correction device, and controller including error correction device

Method of operating memory controller for performing encoding and decoding by using a convolution-type low density parity check code

Error correction decoder and operation method of the error correction decoder

Semiconductor memory devices and methods of operating semiconductor memory devices

Error correction code circuit, memory device including error correction code circuit, and operation method of error correction code

Device, operating method, memory device, and CXL memory expansion device

Memory controller managing refresh operation and operating method thereof

Memory devices and methods thereof for managing row hammer events therein

Memory device performing refresh operation and method of operating the same

Memory systems having memory devices therein with enhanced error correction capability and methods of operating same

Memory device for reducing row hammer disturbance, and a method of refreshing the same

Memory device for reducing row hammer disturbance and a method of refreshing the same

Memory controller, operating method of memory controller and memory system

Memory device, operating method of memory device, and memory system including memory device

Memory device and operation method thereof

Semiconductor memory device including a cyclic redundancy check engine and memory system including the same

Semiconductor memory device and memory system including the same

Semiconductor memory device and method of operating the same

Semiconductor memory devices

Integrated circuit memory devices having efficient row hammer management and memory systems including the same

Memory device and operating method thereof

Methods of operating memory controllers, memory controllers performing the methods and memory systems including the memory controllers

Memory system to determine interference of a memory cell by adjacent memory cells, and operating method thereof

Memory system, method of operating the same, and electronic system including the same

Memory controllers and memory systems including the same

Semiconductor memory devices and methods of operating semiconductor memory devices

Memory device and method reading data

LEE KIJUN

Memory controller changing partial data in memory device and method for changing partial data thereof

Nonvolatile memory device and nonvolatile memory system and random data read method thereof

Data processing systems and methods providing error correction

KIM JAEHONG

Memory system to determine interference of a memory cell by adjacent memory cells, and operating method thereof

OH EUN CHU

Nonvolatile memory device and data write method

SHIN DONG-MIN

Storage device including error correction decoder and operating method of error correction decoder