Inventor
CHEN SHYNG-TSONG
US57 patents
⚠️ This page may combine multiple inventors who share the name “CHEN SHYNG-TSONG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
40 patentsUS6685548B2Feb 3, 2004
Grooved polishing pads and methods of use
IBM137 citations99
US7008871B2Mar 7, 2006
Selective capping of copper wiring
IBM105 citations98
US6975032B2Dec 13, 2005
Copper recess process with application to selective capping and electroless plating
IBM85 citations97
US6656019B1Dec 2, 2003
Grooved polishing pads and methods of use
IBM63 citations96
US6383066B1May 7, 2002
Multilayered polishing pad, method for fabricating, and use thereof
IBM91 citations96
US7745324B1Jun 29, 2010
Interconnect with recessed dielectric adjacent a noble metal cap
IBM24 citations93
US7314786B1Jan 1, 2008
Metal resistor, resistor material and method
IBM18 citations93
US7190079B2Mar 13, 2007
Selective capping of copper wiring
IBM39 citations92
US7064064B2Jun 20, 2006
Copper recess process with application to selective capping and electroless plating
IBM22 citations92
US7514361B2Apr 7, 2009
Selective thin metal cap process
IBM28 citations91
US6734096B2May 11, 2004
Fine-pitch device lithography using a sacrificial hardmask
IBM22 citations91
US6712681B1Mar 30, 2004
Polishing pads with polymer filled fibrous web, and methods for fabricating and using same
IBM26 citations91
US6340325B1Jan 22, 2002
Polishing pad grooving method and apparatus
IBM31 citations91
US7084479B2Aug 1, 2006
Line level air gaps
IBM27 citations90
US6267659B1Jul 31, 2001
Stacked polish pad
IBM27 citations90
US9224686B1Dec 29, 2015
Single damascene interconnect structure
IBM11 citations84
US7892968B2Feb 22, 2011
Via gouging methods and related semiconductor structure
IBM12 citations84
US7816253B2Oct 19, 2010
Surface treatment of inter-layer dielectric
IBM10 citations84
US7666753B2Feb 23, 2010
Metal capping process for BEOL interconnect with air gaps
IBM18 citations84
US10157789B2Dec 18, 2018
Via formation using sidewall image transfer process to define lateral dimension
IBM12 citations83
US9490168B1Nov 8, 2016
Via formation using sidewall image transfer process to define lateral dimension
IBM10 citations83
US7838428B2Nov 23, 2010
Method of repairing process induced dielectric damage by the use of GCIB surface treatment using gas clusters of organic molecular species
IBM16 citations83
US6989117B2Jan 24, 2006
Polishing pads with polymer filled fibrous web, and methods for fabricating and using same
IBM15 citations80
US7358182B2Apr 15, 2008
Method of forming an interconnect structure
IBM11 citations78
US7671470B2Mar 2, 2010
Enhanced mechanical strength via contacts
IBM5 citations74
US7439624B2Oct 21, 2008
Enhanced mechanical strength via contacts
IBM6 citations74
US7402883B2Jul 22, 2008
Back end of the line structures with liner and noble metal layer
IBM6 citations74
US11189566B2Nov 30, 2021
Tight pitch via structures enabled by orthogonal and non-orthogonal merged vias
IBM2 citations73
US10381563B1Aug 13, 2019
Resistive memory crossbar array compatible with Cu metallization
IBM4 citations73
US10672980B2Jun 2, 2020
Resistive memory crossbar array with top electrode inner spacers
IBM3 citations72
US10361367B1Jul 23, 2019
Resistive memory crossbar array with top electrode inner spacers
IBM4 citations72
US12389803B2Aug 12, 2025
Magnetoresistive random-access memory (MRAM) with preserved underlying dielectric layer
IBM0 citations63
US11735468B2Aug 22, 2023
Interconnect structures including self aligned vias
IBM0 citations63
US11227792B2Jan 18, 2022
Interconnect structures including self aligned vias
IBM0 citations63
US10915690B2Feb 9, 2021
Via design optimization to improve via resistance
IBM0 citations63
US10886168B2Jan 5, 2021
Surface modified dielectric refill structure
IBM0 citations63
US10672984B2Jun 2, 2020
Resistive memory crossbar array compatible with Cu metallization
IBM1 citations63
US9105641B2Aug 11, 2015
Profile control in interconnect structures
IBM2 citations63
US7670943B2Mar 2, 2010
Enhanced mechanical strength via contacts
IBM2 citations63
US11038104B2Jun 15, 2021
Resistive memory crossbar array with top electrode inner spacers
IBM0 citations62
FREUDENBERG NONWOVENS LTD
2 patentsYANG CHIH-CHAO
2 patentsCHEN SHYNG-TSONG
2 patentsUS8519540B2Aug 27, 2013
Self-aligned dual damascene BEOL structures with patternable low- K material and methods of forming same
CHEN SHYNG-TSONG10 citations82
US8415248B2Apr 9, 2013
Self-aligned dual damascene BEOL structures with patternable low-k material and methods of forming same
CHEN SHYNG-TSONG6 citations82
LIN QINGHUANG
2 patentsNOGAMI TAKESHI
1 patentFITZSIMMONS JOHN A
1 patentShowing the top 50 of 57 patents by PatentIndex Score.