Inventor
DEPROSPO BARTLET H
US34 patents
⚠️ This page may combine multiple inventors who share the name “DEPROSPO BARTLET H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
28 patentsUS9911651B1Mar 6, 2018
Skip-vias bypassing a metallization level at minimum pitch
IBM26 citations94
US10366952B2Jul 30, 2019
Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device
IBM5 citations84
US10109579B2Oct 23, 2018
Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device
IBM8 citations84
US10083905B2Sep 25, 2018
Skip-vias bypassing a metallization level at minimum pitch
IBM9 citations84
US9997451B2Jun 12, 2018
Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device
IBM5 citations84
US9837305B1Dec 5, 2017
Forming deep airgaps without flop over
IBM10 citations84
US9793206B1Oct 17, 2017
Heterogeneous metallization using solid diffusion removal of metal interconnects
IBM8 citations84
US9418327B1Aug 16, 2016
Security key system
IBM6 citations84
US9685366B1Jun 20, 2017
Forming chamferless vias using thermally decomposable porefiller
IBM12 citations83
US10912986B2Feb 9, 2021
Dynamic rigidity mechanism
IBM3 citations73
US10559498B2Feb 11, 2020
Location-specific laser annealing to improve interconnect microstructure
IBM2 citations73
US10515894B2Dec 24, 2019
Enhanced self-alignment of vias for a semiconductor device
IBM2 citations73
US10366920B2Jul 30, 2019
Location-specific laser annealing to improve interconnect microstructure
IBM2 citations73
US10099108B2Oct 16, 2018
Dynamic rigidity mechanism
IBM2 citations73
US9837485B2Dec 5, 2017
High-density MIM capacitors
IBM3 citations73
US9824982B1Nov 21, 2017
Structure and fabrication method for enhanced mechanical strength crack stop
IBM2 citations73
US9778007B1Oct 3, 2017
Matching a spent firearm cartridge
IBM2 citations73
US10150323B2Dec 11, 2018
Structure, system, method, and recording medium of implementing a directed self-assembled security pattern
IBM1 citations63
US10211151B2Feb 19, 2019
Enhanced self-alignment of vias for asemiconductor device
IBM1 citations62
US10784156B2Sep 22, 2020
Self-aligned airgaps with conductive lines and vias
IBM0 citations52
US10770348B2Sep 8, 2020
Location-specific laser annealing to improve interconnect microstructure
IBM0 citations52
US10752039B2Aug 25, 2020
Structure of implementing a directed self-assembled security pattern
IBM0 citations52
US10315451B2Jun 11, 2019
Structure, system, method, and recording medium of implementing a directed self-assembled security pattern
IBM0 citations52
US10229967B2Mar 12, 2019
High-density MIM capacitors
IBM0 citations52
US9899256B2Feb 20, 2018
Self-aligned airgaps with conductive lines and vias
IBM0 citations52
US9899338B1Feb 20, 2018
Structure and fabrication method for enhanced mechanical strength crack stop
IBM0 citations52
US9881431B2Jan 30, 2018
Security key system
IBM0 citations52
US9760817B2Sep 12, 2017
Security key system
IBM0 citations52
TESSERA INC
2 patentsUS11056429B2Jul 6, 2021
Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device
TESSERA INC4 citations84
US10629529B2Apr 21, 2020
Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device
TESSERA INC3 citations84
ADEIA SEMICONDUCTOR SOLUTIONS LLC
2 patentsUS11955424B2Apr 9, 2024
Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device
ADEIA SEMICONDUCTOR SOLUTIONS LLC1 citations73
US12550709B2Feb 10, 2026
Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device
ADEIA SEMICONDUCTOR SOLUTIONS LLC0 citations62