Inventor

CUI ZHIXIN

JP49 patents

⚠️ This page may combine multiple inventors who share the name “CUI ZHIXIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CUI ZHIXIN

SANDISK TECHNOLOGIES LLC

Three-dimensional memory device having contact via structures in overlapped terrace region and method of making thereof

Three-dimensional flat NAND memory device having curved memory elements and methods of making the same

Concurrent formation of memory openings and contact openings for a three-dimensional memory device

Three-dimensional memory device containing through-memory-level contact via structures

Three-dimensional memory device having integrated support and contact structures and method of making thereof

Three-dimensional memory device including inverted memory stack structures and methods of making the same

Three-dimensional memory device including composite word lines and multi-strip select lines and method for making the same

Three-dimensional memory device with self-aligned vertical conductive strips having a gate-all-around configuration and method of making the same

Three-dimensional memory device including composite word lines and multi-strip select lines and method for making the same

Three-dimensional flat NAND memory device having curved memory elements and methods of making the same

Three-dimensional memory device and method of making the same using concurrent formation of memory openings and contact openings

Concurrent formation of memory openings and contact openings for a three-dimensional memory device

Three-dimensional NOR-NAND combination memory device and method of making the same

Three-dimensional memory device containing self-aligned contact via structures and methods of manufacturing the same

Three-dimensional device with bonded structures including a support die and methods of making the same

Three-dimensional memory device containing a carbon-doped source contact layer and methods for making the same

Bonded assembly containing memory die bonded to integrated peripheral and system die and methods for making the same

Through-stack contact via structures for a three-dimensional memory device and methods of forming the same

Stacked die assembly including double-sided inter-die bonding connections and methods of forming the same

Three-dimensional memory device containing through-memory-level contact via structures

Three-dimensional memory device containing through-memory-level contact via structures and method of making the same

Three-dimensional memory device and methods of making the same using replacement drain select gate electrodes

Three-dimensional memory device with composite charge storage structures and methods for forming the same

Multi-tier three-dimensional memory device containing differential etch rate field oxides and method of making the same

Three-dimensional memory device including a composite semiconductor channel and a horizontal source contact layer and method of making the same

Multilevel memory stack structure with tapered inter-tier joint region and methods of making thereof

Three-dimensional memory device including laterally-undulating memory material layers and methods for forming the same

Three-dimensional memory device including a composite semiconductor channel and a horizontal source contact layer and method of making the same

Three-dimensional memory device including laterally-undulating memory material layers and methods for forming the same

Three-dimensional memory device including a composite semiconductor channel and a horizontal source contact layer and method of making the same

Three-dimensional memory device including composite word lines and multi-strip select lines and method for making the same

Three-dimensional memory device containing inter-select-gate electrodes and methods of making the same

Three-dimensional memory device including different height memory stack structures and methods of making the same

Three-dimensional memory device including different height memory stack structures and methods of making the same

Three-dimensional memory device including bottle-shaped memory stack structures and drain-select gate electrodes having cylindrical portions

Three-dimensional memory device and methods of making the same using replacement drain select gate electrodes

Three-dimensional memory device with separated contact regions and methods for forming the same

Memory block with separately driven source regions to improve performance

Three-dimensional memory device including bump-containing bit lines and methods for manufacturing the same

Three-dimensional flat NAND memory device having curved memory elements and methods of making the same

Three-dimensional flat NAND memory device having curved memory elements and methods of making the same

Three-dimensional memory device with locally modulated threshold voltages at drain select levels and methods of making the same

Three-dimensional memory device with a conductive drain-select-level spacer and methods for forming the same

Three-dimensional memory device with separated contact regions

Three-dimensional memory device including a dummy word line with tapered corner and method of making the same

CHENGDU BOE OPTOELECT TECH CO

Flexible printed circuit board and method for manufacturing the same, and display device

Display module and display device

WESTERN DIGITAL TECH INC

I/O modulation scheme for ultra-high data throughput with massive NAND parallelism

On-chip performance throttling