Inventor

YANG XIANG

US219 patents

⚠️ This page may combine multiple inventors who share the name “YANG XIANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YANG XIANG

SANDISK TECHNOLOGIES LLC

Negative voltage wordline methods and systems

Non-volatile memory with countermeasures for select gate disturb during program pre-charge

Sub-block mode for non-volatile memory

Row dependent sensing in nonvolatile memory

Pre-charge voltage for inhibiting unselected NAND memory cell programming

Managing bit-line settling time in non-volatile memory

Source voltage modulated reads in non-volatile memories

Pre-charge voltage for inhibiting unselected NAND memory cell programming

Select line voltage waveform real-time monitor for non-volatile memory

Programming process combining adaptive verify with normal and slow programming speeds in a memory device

Non-volatile memory with countermeasure for over programming

Programming process which compensates for data state of adjacent memory cell in a memory device

Dynamic 1-tier scan for high performance 3D NAND

Interleaved program and verify in non-volatile memory

Peak current suppression

Asymmetric voltage ramp rate control

Bitline boost for nonvolatile memory

Source side program, method, and apparatus for 3D NAND

Bit line control that reduces select gate transistor disturb in erase operations

Edge word line concurrent programming with verify for memory apparatus with on-pitch semi-circle drain side select gate technology

Dynamic word line reconfiguration for NAND structure

Three-dimensional memory device including low-k drain-select-level isolation structures and methods of forming the same

Non-volatile memory with speed control

Variable bit line bias for nonvolatile memory

Erase method for non-volatile memory with multiple tiers

Dummy cell resistance tuning in NAND strings

Systems and methods for distributing programming speed among blocks with different program-erase cycle counts

Non-volatile memory with program skip for edge word line

Non-volatile memory with fast multi-level program verify

Memory apparatus and method of operation using negative kick clamp for fast read

Multi-level program pulse for programming single level memory cells to reduce damage

Non-volatile memory with countermeasure for over programming

Programming process combining adaptive verify with normal and slow programming speeds in a memory device

Concurrent programming of multiple cells for non-volatile memory devices

Memory cell mis-shape mitigation

Wordline voltage overdrive methods and systems

Predictive boosting for 3D NAND

Memory disturb detection

Programming selection devices in non-volatile memory strings

Bias scheme for dummy lines of data storage devices

Memory device with connected word lines for fast programming

Adaptive programming voltage for non-volatile memory devices

Bit line voltage control for damping memory programming

Adaptive control of memory cell programming voltage

System and method for in-situ programming and read operation adjustments in a non-volatile memory

Memory cell group read with compensation for different programming speeds

Non-volatile memory with staggered ramp down at the end of pre-charging

Memory apparatus and method of operation using triple string concurrent programming during erase

YANG XIANG

LED drive circuit

SHENZHEN CHINA STAR OPTOELECT

Overvoltage protection circuit, overvoltage protection method and panel driving circuit