Inventor
TSAI CHAU-CHAD
TW18 patents
⚠️ This page may combine multiple inventors who share the name “TSAI CHAU-CHAD”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
VIA TECH INC
17 patentsUS6549964B1Apr 15, 2003
Delayed transaction method and device used in a PCI system
VIA TECH INC23 citations92
US6941398B2Sep 6, 2005
Processing method, chip set and controller for supporting message signaled interrupt
VIA TECH INC40 citations88
US6795883B2Sep 21, 2004
Method and system for dividing configuration space
VIA TECH INC15 citations83
US6721833B2Apr 13, 2004
Arbitration of control chipsets in bus transaction
VIA TECH INC15 citations83
US6546448B1Apr 8, 2003
Method and apparatus for arbitrating access to a PCI bus by a plurality of functions in a multi-function master
VIA TECH INC14 citations83
US6694400B1Feb 17, 2004
PCI system controller capable of delayed transaction
VIA TECH INC11 citations73
US6684284B1Jan 27, 2004
Control chipset, and data transaction method and signal transmission devices therefor
VIA TECH INC8 citations73
US7107373B2Sep 12, 2006
Method of hot switching data transfer rate on bus
VIA TECH INC2 citations62
US6718400B1Apr 6, 2004
Data accessing system with an access request pipeline and access method thereof
VIA TECH INC2 citations62
US6622213B2Sep 16, 2003
Two-way cache system and method for interfacing a memory unit with a peripheral device using first and second cache data regions
VIA TECH INC6 citations62
US7136955B2Nov 14, 2006
Expansion adapter supporting both PCI and AGP device functions
VIA TECH INC3 citations61
US6678771B1Jan 13, 2004
Method of adjusting an access sequencing scheme for a number of PCI- compliant units coupled to a PCI bus system
VIA TECH INC5 citations61
US6934789B2Aug 23, 2005
Interface, structure and method for transmitting data of PCI bus which uses bus request signal for judging whether a device supporting dual transmission mode
VIA TECH INC3 citations60
US7805567B2Sep 28, 2010
Chipset and northbridge with raid access
VIA TECH INC0 citations50
US7051148B2May 23, 2006
Data transmission sequencing method associated with briding device and application system
VIA TECH INC0 citations50
US6925517B2Aug 2, 2005
Bus for supporting plural signal line configurations and switch method thereof
VIA TECH INC0 citations41
US6836829B2Dec 28, 2004
Peripheral device interface chip cache and data synchronization method
VIA TECH INC0 citations41