Inventor

PREISS JOCHEN

DE19 patents

⚠️ This page may combine multiple inventors who share the name “PREISS JOCHEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PREISS JOCHEN

IBM

Multiplexing output from second execution unit add/saturation processing portion of wider width intermediate result of first primitive execution unit for compound computation

Floating point unit with fused multiply add and method for calculating a result with a floating point unit

Semiconductor chip with a plurality of scannable storage elements and a method for scanning storage elements on a semiconductor chip

System and method for storing numbers in first and second formats in a register file

Efficient forcing of corner cases in a floating point rounder

Binary logic unit and method to operate a binary logic unit

3-stack floorplan for floating point unit

Design structure to reduce power consumption within a clock gated synchronous circuit and clock gated synchronous circuit

Method to reduce power consumption within a clock gated synchronous circuit and clock gated synchronous circuit

Electronic computing circuit for operand width reduction for a modulo adder followed by saturation concurrent message processing

BOERSMA MAARTEN J

Normalizer shift prediction for log estimate instructions

Supporting multiple formats in a floating point processor

Fast floating point compare with slower backup for corner cases

BAROWSKI HARRY S

Zero indication forwarding for floating point unit power reduction

Zero indication forwarding for floating point unit power reduction

BOERSMA MAARTEN

Reuse of rounder for fixed conversion of log instructions

Shifter with all-one and all-zero detection using a portion of partially shifted vector and shift amount in parallel to generated shifted result

DAO SON TRONG

Distributed residue-checking of a floating point unit

GEMMEKE TOBIAS

Binary logic unit and method to operate a binary logic unit