Inventor
CHUANG CHING-TE
TW34 patents
⚠️ This page may combine multiple inventors who share the name “CHUANG CHING-TE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
15 patentsUS7362606B2Apr 22, 2008
Asymmetrical memory cells and memories using the cells
IBM54 citations96
US7313012B2Dec 25, 2007
Back-gate controlled asymmetrical memory cell and memory using the cell
IBM23 citations92
US7952422B2May 31, 2011
Methods and apparatus for varying a supply voltage or reference voltage using independent control of diode voltage in asymmetrical double-gate devices
IBM11 citations84
US7492628B2Feb 17, 2009
Computer-readable medium encoding a memory using a back-gate controlled asymmetrical memory cell
IBM10 citations84
US7336105B2Feb 26, 2008
Dual gate transistor keeper dynamic logic
IBM9 citations84
US7323908B2Jan 29, 2008
Cascaded pass-gate test circuit with interposed split-output drive devices
IBM10 citations84
US7298176B2Nov 20, 2007
Dual-gate dynamic logic circuit with pre-charge keeper
IBM12 citations84
US7342287B2Mar 11, 2008
Power gating schemes in SOI circuits in hybrid SOI-epitaxial CMOS structures
IBM17 citations83
US7903450B2Mar 8, 2011
Asymmetrical memory cells and memories using the cells
IBM6 citations74
US7787285B2Aug 31, 2010
Independent-gate controlled asymmetrical memory cell and memory using the cell
IBM2 citations63
US7742327B2Jun 22, 2010
Computer-readable medium encoding a back-gate controlled asymmetrical memory cell and memory using the cell
IBM4 citations63
US7417889B2Aug 26, 2008
Independent-gate controlled asymmetrical memory cell and memory using the cell
IBM5 citations63
US7265589B2Sep 4, 2007
Independent gate control logic circuitry
IBM2 citations63
US7876131B2Jan 25, 2011
Dual gate transistor keeper dynamic logic
IBM0 citations52
US7782092B2Aug 24, 2010
Cascaded pass-gate test circuit with interposed split-output drive devices
IBM0 citations52
CHUANG CHING-TE
10 patentsUS8320164B2Nov 27, 2012
Static random access memory with data controlled power supply
CHUANG CHING-TE21 citations90
US8804445B2Aug 12, 2014
Oscillato based on a 6T SRAM for measuring the bias temperature instability
CHUANG CHING-TE7 citations82
US8659936B2Feb 25, 2014
Low power static random access memory
CHUANG CHING-TE13 citations82
US8325512B2Dec 4, 2012
SRAM writing system and related apparatus
CHUANG CHING-TE15 citations80
US8169814B2May 1, 2012
Schmitt trigger-based finFET SRAM cell
CHUANG CHING-TE8 citations79
US8213257B2Jul 3, 2012
Variation-tolerant word-line under-drive scheme for random access memory
CHUANG CHING-TE5 citations62
US8582378B1Nov 12, 2013
Threshold voltage measurement device
CHUANG CHING-TE4 citations59
US8259510B2Sep 4, 2012
Disturb-free static random access memory cell
CHUANG CHING-TE4 citations59
US8854897B2Oct 7, 2014
Static random access memory apparatus and bit-line voltage controller thereof
CHUANG CHING-TE0 citations48
US8717807B2May 6, 2014
Independently-controlled-gate SRAM
CHUANG CHING-TE1 citations46
UNIV NAT CHIAO TUNG
5 patentsUS8837207B1Sep 16, 2014
Static memory and memory cell thereof
UNIV NAT CHIAO TUNG30 citations91
US7973564B1Jul 5, 2011
High load driving device
UNIV NAT CHIAO TUNG15 citations82
US8385149B2Feb 26, 2013
Gate oxide breakdown-withstanding power switch structure
UNIV NAT CHIAO TUNG5 citations73
US8773894B2Jul 8, 2014
Static random access memory with ripple bit lines/search lines for improving current leakage/variation tolerance and density/performance
UNIV NAT CHIAO TUNG0 citations36
US9159403B2Oct 13, 2015
Control circuit of SRAM and operating method thereof
UNIV NAT CHIAO TUNG0 citations35