Inventor

BAHL SANDEEP R

US30 patents

⚠️ This page may combine multiple inventors who share the name “BAHL SANDEEP R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BAHL SANDEEP R

TEXAS INSTRUMENTS INC

Overvoltage protection and short-circuit withstanding for gallium nitride devices

Overvoltage protection and short-circuit withstanding for gallium nitride devices

High-resolution power electronics measurements

Method and circuitry for controlling a depletion-mode transistor

Method and circuitry for controlling a depletion-mode transistor

High voltage device with multi-electrode control

High voltage device with multi-electrode control

NAT SEMICONDUCTOR CORP

Growth of multi-layer group III-nitride buffers on large-area silicon substrates and other substrates

Semiconductor structure in which source and drain extensions of field-effect transistor are defined with different dopants

Asymmetric field-effect transistor having asymmetric channel zone and differently configured source/drain extensions

Growth of multi-layer group III-nitride buffers on large-area silicon substrates and other substrates

Structure and fabrication of like-polarity field-effect transistors having different configurations of source/drain extensions, halo pockets, and gate dielectric thicknesses

BULUCEA CONSTANTIN

Configuration and fabrication of semiconductor structure using empty and filled wells

Structure and fabrication of field-effect transistor using empty well in combination with source/drain extensions or/and halo pocket

Structure and fabrication of asymmetric field-effect transistor having asymmetric channel zone and differently configured source/drain extensions

Structure and fabrication of like-polarity field-effect transistors having different configurations of source/drain extensions, halo pockets, and gate dielectric thicknesses

BAHL SANDEEP R

Growth of multi-layer group III-nitride buffers on large-area silicon substrates and other substrates

Configuration and fabrication of semiconductor structure in which source and drain extensions of field-effect transistor are defined with different dopants

Growth of group III nitride-based structures and integration with conventional CMOS processing tools

Ohmic contact schemes for group III-V devices having a two-dimensional electron gas layer

AVAGO TECHNOLOGIES GENERAL IP

Method and apparatus for integrating III-V semiconductor devices into silicon processes

Carrier confinement in light-emitting group IV semiconductor devices

Light-emitting Group IV semiconductor devices

YANG JENG-JIUN

Fabrication of semiconductor structure having asymmetric field-effect transistor with tailored pocket portion along source/drain zone

Configuration and fabrication of semiconductor structure having asymmetric field-effect transistor with tailored pocket portion along source/drain zone

AGILENT TECHNOLOGIES INC

Etching heterojunction interfaces

Heterojunction bipolar transistor (HBT) having improved emitter-base grading structure

MICRON TECHNOLOGY INC

Reduced crosstalk CMOS image sensors

PARKER D COURTNEY

Fabrication of asymmetric field-effect transistors using L-shaped spacers

APTINA IMAGING CORP

Reduced crosstalk CMOS image sensors