Inventor

NA KYU TAE

US16 patents

⚠️ This page may combine multiple inventors who share the name “NA KYU TAE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SAMSUNG ELECTRONICS CO LTD

12 patents

US7192891B2Mar 20, 2007

Method for forming a silicon oxide layer using spin-on glass

SAMSUNG ELECTRONICS CO LTD21 citations92

US7601588B2Oct 13, 2009

Method of forming a trench isolation layer and method of manufacturing a non-volatile memory device using the same

SAMSUNG ELECTRONICS CO LTD12 citations83

US7585786B2Sep 8, 2009

Methods of forming spin-on-glass insulating layers in semiconductor devices and associated semiconductor device

SAMSUNG ELECTRONICS CO LTD11 citations82

US7332409B2Feb 19, 2008

Methods of forming trench isolation layers using high density plasma chemical vapor deposition

SAMSUNG ELECTRONICS CO LTD13 citations82

US7517817B2Apr 14, 2009

Method for forming a silicon oxide layer using spin-on glass

SAMSUNG ELECTRONICS CO LTD7 citations73

US8017495B2Sep 13, 2011

Method of forming isolation layer structure and method of manufacturing a semiconductor device including the same

SAMSUNG ELECTRONICS CO LTD2 citations62

US7560383B2Jul 14, 2009

Method of forming a thin layer and method of manufacturing a non-volatile semiconductor device using the same

SAMSUNG ELECTRONICS CO LTD2 citations62

US7358190B2Apr 15, 2008

Methods of filling gaps by deposition on materials having different deposition rates

SAMSUNG ELECTRONICS CO LTD6 citations62

US7598177B2Oct 6, 2009

GLOBALFOUNDRIES INC

1 patent

US8673723B1Mar 18, 2014

Methods of forming isolation regions for FinFET semiconductor devices

GLOBALFOUNDRIES INC8 citations83

ASM JAPAN

1 patent

US7410915B2Aug 12, 2008

Method of forming carbon polymer film using plasma CVD

ASM JAPAN6 citations62

KIM JU-WAN

1 patent

US8237240B2Aug 7, 2012

Isolation layer structure, method of forming the same and method of manufacturing a semiconductor device including the same

KIM JU-WAN2 citations56

HUR WON-GOO

1 patent

US8563429B2Oct 22, 2013

Methods of forming a metal silicide layer for semiconductor devices

HUR WON-GOO0 citations34

NA KYU TAE

SAMSUNG ELECTRONICS CO LTD

Method for forming a silicon oxide layer using spin-on glass

Method of forming a trench isolation layer and method of manufacturing a non-volatile memory device using the same

Methods of forming spin-on-glass insulating layers in semiconductor devices and associated semiconductor device

Methods of forming trench isolation layers using high density plasma chemical vapor deposition

Method for forming a silicon oxide layer using spin-on glass

Method of forming isolation layer structure and method of manufacturing a semiconductor device including the same

Method of forming a thin layer and method of manufacturing a non-volatile semiconductor device using the same

Methods of filling gaps by deposition on materials having different deposition rates

Methods of filling trenches using high-density plasma deposition (HDP)

Methods of filling trenches using high-density plasma deposition (HDP)

Method of removing an oxide and method of filling a trench using the same

Methods of forming semiconductor devices having multilayer isolation structures

GLOBALFOUNDRIES INC

Methods of forming isolation regions for FinFET semiconductor devices

ASM JAPAN

Method of forming carbon polymer film using plasma CVD

KIM JU-WAN

Isolation layer structure, method of forming the same and method of manufacturing a semiconductor device including the same

HUR WON-GOO

Methods of forming a metal silicide layer for semiconductor devices