P

Inventor

OOI ENG HUN

MY36 patents
⚠️ This page may combine multiple inventors who share the name “OOI ENG HUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

28 patents
US6854045B2Feb 8, 2005

Hardware emulation of parallel ATA drives with serial ATA interface

INTEL CORP83 citations96
US11387852B2Jul 12, 2022

Time encoded data communication protocol, apparatus and method for generating and receiving a data signal

INTEL CORP22 citations91
US8051314B2Nov 1, 2011

Serial ATA (SATA) power optimization through automatic deeper power state transition

INTEL CORP11 citations84
US10402565B2Sep 3, 2019

In-system provisioning of firmware for a hardware platform

INTEL CORP6 citations82
US7565457B2Jul 21, 2009

Serial advanced technology attachment device presence detection and hot-plug in low power mode

INTEL CORP16 citations80
US11038749B2Jun 15, 2021

Memory resource allocation in an end-point device

INTEL CORP3 citations73
US9116694B2Aug 25, 2015

Efficient low power exit sequence for peripheral devices

INTEL CORP5 citations73
US9684457B2Jun 20, 2017

Gathering sensed data from devices to manage host command transmission and cooling of the devices

INTEL CORP3 citations72
US9594910B2Mar 14, 2017

In-system provisioning of firmware for a hardware platform

INTEL CORP3 citations71
US11979177B2May 7, 2024

Time encoded data communication protocol, apparatus and method for generating and receiving a data signal

INTEL CORP2 citations70
US9792246B2Oct 17, 2017

Lower-power scrambling with improved signal integrity

INTEL CORP5 citations69
US11307638B2Apr 19, 2022

Securely providing multiple wake-up time options for PCI Express

INTEL CORP4 citations68
US7603514B2Oct 13, 2009

Method and apparatus for concurrent and independent data transfer on host controllers

INTEL CORP6 citations63
US11704275B2Jul 18, 2023

Dynamic presentation of interconnect protocol capability structures

INTEL CORP0 citations62
US11080223B2Aug 3, 2021

Dynamic presentation of interconnect protocol capability structures

INTEL CORP0 citations62
US10977197B2Apr 13, 2021

Providing multiple low power link state wake-up options

INTEL CORP1 citations62
US7844777B2Nov 30, 2010

Cache for a host controller to store command header information

INTEL CORP2 citations59
US11947995B2Apr 2, 2024

End-to-end data protection for far memory data transfer from host to media

INTEL CORP0 citations58
US10942672B2Mar 9, 2021

Data transfer method and apparatus for differential data granularities

INTEL CORP0 citations58
US11023244B2Jun 1, 2021

System, apparatus and method for recovering link state during link training

INTEL CORP0 citations57
US10572339B2Feb 25, 2020

Memory latency management

INTEL CORP0 citations52
US10127184B2Nov 13, 2018

Low overheard high throughput solution for point-to-point link

INTEL CORP0 citations52
US9904592B2Feb 27, 2018

Memory latency management

INTEL CORP1 citations52
US10649484B2May 12, 2020

Dynamic adaptive clocking for non-common-clock interfaces

INTEL CORP0 citations51
US9952619B2Apr 24, 2018

Dynamic adaptive clocking for non-common-clock interfaces

INTEL CORP0 citations51
US9910771B2Mar 6, 2018

Non-volatile memory interface

INTEL CORP0 citations51
US9535829B2Jan 3, 2017

Non-volatile memory interface

INTEL CORP1 citations51
US10345885B2Jul 9, 2019

Power control of a memory device through a sideband channel of a memory bus

INTEL CORP0 citations38

OOI ENG HUN

4 patents

HUFFMAN AMBER D

1 patent

GUOK NGEK LEONG

1 patent

EDWARDS DAVID A

1 patent

SK HYNIX NAND PRODUCT SOLUTIONS CORP

1 patent