Inventor

BEILIN SOLOMON I

US52 patents

⚠️ This page may combine multiple inventors who share the name “BEILIN SOLOMON I”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BEILIN SOLOMON I

FUJITSU LTD

Process flows for formation of fine structure layer pairs on flexible films

Through hole interconnect substrate fabrication process

Multi-layer opto-electronic substrates with electrical and optical interconnections and methods for making

Three-dimensional opto-electronic modules with electrical and optical interconnections and methods for making

Optical coupling structures and the fabrication processes

Opto-electronic substrates with electrical and optical interconnections and methods for making

Methods for detaching a layer from a substrate

Systems based on opto-electronic substrates with electrical and optical interconnections and methods for making

Method and structure of z-connected laminated substrate for high density electronic packaging

Method of fabrication of multiple-layer high density substrate

Chip and board stress relief interposer

Controlled impedence interposer substrate

Electron-beam treatment procedure for patterned mask layers

Interconnect carriers having high-density vertical connectors and methods for making the same

Single and multilayer waveguides and fabrication process

Optical reflective structures and method for making

Methods for fabricating flexible circuit structures

Multi-layer circuit substrates and electrical assemblies having conductive composition connectors

Fabrication procedure for a stable post

Methods of planarizing structures on wafers and substrates by polishing

Controlled impedance interposer substrate and method of making

Power supply distribution structure for integrated circuit chip modules

Sputtered and anodized capacitors capable of withstanding exposure to high temperatures

Multichip module substrate

Method for fabricating thin-film interconnector

Wire interconnect structures for connecting an integrated circuit to a substrate

Methods of etching through wafers and substrates with a composite etch stop layer

Method of forming a pattern or via structure utilizing supplemental electron beam exposure and development to remove image residue

Power conducting substrates with high-yield integrated substrate capacitor

Methods of planarizing structures on wafers and substrates by polishing

Methods of manufacturing power supply distribution structures for multichip modules

Method of curing thin films of organic dielectric material

Process for fabricating a substrate with thin film capacitor

Thin film capacitor

Apparatus for uniform chemical mechanical polishing by intermittent lifting and reversible rotation

Venting hole designs for multilayer conductor-dielectric structures

Controlled retention of slurry in chemical mechanical polishing

Pattern or via structure formed through supplemental electron beam exposure and development to remove image residue

Wet chemical processing techniques for plating high aspect ratio features

Conductive composition

Methods for making circuit substrates and electrical assemblies

Cleaning method using ammonium persulphate to remove slurry particles from CMP substrates

Structure and fabrication procedure for a stable post

Method of making a multichip module substrate

Self-aligned patterns by chemical-mechanical polishing particularly suited to the formation of MCM capacitors

KULICKE & SOFFA HOLDINGS INC

Isolated flip chip of BGA to minimize interconnect stress due to thermal mismatch

Wiring substrate with thermal insert

Isolated flip chip or BGA to minimize interconnect stress due to thermal mismatch

EPID INC

Positive particles in electrophoretic display device composition

ZWEMER DIRK A

Degradation retardants for electrophoretic display devices