Inventor
LI LI-CHUN
US35 patents
⚠️ This page may combine multiple inventors who share the name “LI LI-CHUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MOSEL VITELIC INC
16 patentsUS6355524B1Mar 12, 2002
Nonvolatile memory structures and fabrication methods
MOSEL VITELIC INC193 citations97
US6191997B1Feb 20, 2001
Memory burst operations in which address count bits are used as column address bits for one, but not both, of the odd and even columns selected in parallel.
MOSEL VITELIC INC48 citations92
US5440246AAug 8, 1995
Programmable circuit with fusible latch
MOSEL VITELIC INC26 citations92
US6617636B2Sep 9, 2003
Nonvolatile memory structures and fabrication methods
MOSEL VITELIC INC13 citations91
US6975535B2Dec 13, 2005
Electronic memory, such as flash EPROM, with bitwise-adjusted writing current or/and voltage
MOSEL VITELIC INC21 citations88
US6584018B2Jun 24, 2003
Nonvolatile memory structures and access methods
MOSEL VITELIC INC15 citations84
US6721224B2Apr 13, 2004
Memory refresh methods and circuits
MOSEL VITELIC INC12 citations73
US6674669B2Jan 6, 2004
Nonvolatile memory structures and access methods
MOSEL VITELIC INC6 citations73
US6757199B2Jun 29, 2004
Nonvolatile memory structures and fabrication methods
MOSEL VITELIC INC4 citations72
US6643186B2Nov 4, 2003
Nonvolatile memory structures and fabrication methods
MOSEL VITELIC INC9 citations72
US6172554B1Jan 9, 2001
Power supply insensitive substrate bias voltage detector circuit
MOSEL VITELIC INC10 citations71
US5986474ANov 16, 1999
Data line bias circuit
MOSEL VITELIC INC13 citations70
US7046551B2May 16, 2006
Nonvolatile memories with asymmetric transistors, nonvolatile memories with high voltage lines extending in the column direction, and nonvolatile memories with decoding circuits sharing a common area
MOSEL VITELIC INC2 citations63
US6406953B1Jun 18, 2002
Method for fabricating an integrated circuit with a transistor electrode
MOSEL VITELIC INC4 citations61
US6373778B1Apr 16, 2002
Burst operations in memories
MOSEL VITELIC INC5 citations54
US6777280B2Aug 17, 2004
Method for fabricating an integrated circuit with a transistor electrode
MOSEL VITELIC INC0 citations51
MOSEL VITELIC CORP
14 patentsUS6133597AOct 17, 2000
Biasing an integrated circuit well with a transistor electrode
MOSEL VITELIC CORP95 citations96
US5768200AJun 16, 1998
Charging a sense amplifier
MOSEL VITELIC CORP29 citations92
US5757710AMay 26, 1998
DRAM with edge sense amplifiers which are activated along with sense amplifiers internal to the array during a read cycle
MOSEL VITELIC CORP30 citations92
US5844296ADec 1, 1998
Space saving laser programmable fuse layout
MOSEL VITELIC CORP17 citations84
US6011737AJan 4, 2000
DRAM with edge sense amplifiers which are activated along with sense amplifiers internal to the array during a read cycle
MOSEL VITELIC CORP7 citations73
US5966338AOct 12, 1999
Dram with new I/O data path configuration
MOSEL VITELIC CORP7 citations73
US5912571AJun 15, 1999
Using the internal supply voltage ramp rate to prevent premature enabling of a device during power-up
MOSEL VITELIC CORP14 citations73
US5781488AJul 14, 1998
DRAM with new I/O data path configuration
MOSEL VITELIC CORP11 citations73
US5761112AJun 2, 1998
Charge storage for sensing operations in a DRAM
MOSEL VITELIC CORP13 citations73
US5889414AMar 30, 1999
Programmable circuits
MOSEL VITELIC CORP15 citations68
US5907257AMay 25, 1999
Generation of signals from other signals that take time to develop on power-up
MOSEL VITELIC CORP4 citations62
US5838622ANov 17, 1998
Reconfigurable multiplexed address scheme for asymmetrically addressed DRAMs
MOSEL VITELIC CORP3 citations62
US5828609AOct 27, 1998
Simulated DRAM memory bit line/bit line for circuit timing and voltage level tracking
MOSEL VITELIC CORP2 citations62
US5812474ASep 22, 1998
I/O bias circuit insensitive to inadvertent power supply variations for MOS memory
MOSEL VITELIC CORP6 citations62