P

Inventor

GUETTAF AMAR

US16 patents
⚠️ This page may combine multiple inventors who share the name “GUETTAF AMAR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BROADCOM CORP

13 patents
US7058868B2Jun 6, 2006

Scan testing mode control of gated clock signals for memory devices

BROADCOM CORP48 citations92
US7500165B2Mar 3, 2009

Systems and methods for controlling clock signals during scan testing integrated circuits

BROADCOM CORP12 citations83
US7441164B2Oct 21, 2008

Memory bypass with support for path delay test

BROADCOM CORP13 citations83
US7131045B2Oct 31, 2006

Systems and methods for scan test access using bond pad test access circuits

BROADCOM CORP13 citations83
US7089471B2Aug 8, 2006

Scan testing mode control of gated clock signals for flip-flops

BROADCOM CORP14 citations83
US7032202B2Apr 18, 2006

System and method for implementing a flexible top level scan architecture using a partitioning algorithm to balance the scan chains

BROADCOM CORP10 citations73
US7424417B2Sep 9, 2008

System and method for clock domain grouping using data path relationships

BROADCOM CORP3 citations62
US6968519B2Nov 22, 2005

System and method for using IDDQ pattern generation for burn-in tests

BROADCOM CORP4 citations62
US6822439B2Nov 23, 2004

Control of tristate buses during scan test

BROADCOM CORP2 citations59
US7581150B2Aug 25, 2009

Methods and computer program products for debugging clock-related scan testing failures of integrated circuits

BROADCOM CORP0 citations51
US7062693B2Jun 13, 2006

Methodology for selectively testing portions of an integrated circuit

BROADCOM CORP1 citations49
US7558722B2Jul 7, 2009

Debug method for mismatches occurring during the simulation of scan patterns

BROADCOM CORP0 citations41
US7395468B2Jul 1, 2008

Methods for debugging scan testing failures of integrated circuits

BROADCOM CORP0 citations41

GUETTAF AMAR

1 patent

ALARCON VERONICA

1 patent

KODIHALLI HIMAKIRAN

1 patent