Inventor

NORMOYLE KEVIN B

US24 patents

⚠️ This page may combine multiple inventors who share the name “NORMOYLE KEVIN B”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

NORMOYLE KEVIN B

SUN MICROSYSTEMS INC

Method and apparatus for reducing power consumption in a computer network without sacrificing performance

Method and apparatus for interrupt communication in packet-switched microprocessor-based computer system

Method and apparatus for interrupt communication in a packet-switched computer system

Low-latency, high-throughput, integrated cache coherent I/O system for a single-chip processor

Structure and method for bi-directional data transfer between asynchronous clock domains

Simplified writeback handling

Method and apparatus for a testable high frequency synchronizer

Method and apparatus for flow control in packet-switched computer system

Pipelined distributed bus arbitration system

DMA transfer method for a system including a single-chip processor with a processing core and a device interface in different clock domains

Method to reduce memory latencies by performing two levels of speculation

Pipelined distributed bus arbitration system

Phase enable and clock generation circuit

Method and circuitry for phase align detection in multi-clock domain

AZUL SYSTEMS INC

Write-back cache with different ECC codings for clean and dirty lines with refetching of uncorrectable clean lines

Address error detection by merging a polynomial-based CRC code of address bits with two nibbles of data or data ECC bits

Wide-scan on-chip logic analyzer with global trigger and interleaved SRAM capture buffers

Encoding 64-bit data nibble error correct and cyclic-redundancy code (CRC) address error detect for use on a 76-bit memory module

Multi-level power monitoring, filtering and throttling at local blocks and globally

Distributed cache coherence at scalable requestor filter pipes that accumulate invalidation acknowledgements from other requestor filter pipes using ordering messages from central snoop tag

STELLAR COMPUTER

Time sliced vector processing

System for transferring multiple vector data elements to and from vector memory in a single operation

DATA GENERAL CORP

Floating point unit interface

NORMOYLE KEVIN B

Subsystem and method for encoding 64-bit data nibble error correct and cyclic-redundancy code (CRC) address error detect for use in a 76-bit memory module