Inventor

TRIYOSO DINA H

US31 patents

⚠️ This page may combine multiple inventors who share the name “TRIYOSO DINA H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TRIYOSO DINA H

FREESCALE SEMICONDUCTOR INC

Method for treating a semiconductor surface to form a metal-containing layer

Electronic device including dielectric layer, and a process for forming the electronic device

Method for forming a layer using a purging gas in a semiconductor process

Semiconductor transistor having structural elements of differing materials and method of formation

Gate dielectric and metal gate integration

Semiconductor transistor having structural elements of differing materials

Method to selectively modulate gate work function through selective Ge condensation and high-K dielectric layer

Method of forming a semiconductor device having a dielectric layer with high dielectric constant

Plasma treatment of a semiconductor surface for enhanced nucleation of a metal-containing layer

ALD gate electrode

Method to reduce impurity elements during semiconductor film deposition

Method of removing defects from a dielectric material in a semiconductor

Method for forming a through silicon via (TSV)

Method of making an integrated circuit using an EUV mask formed by atomic layer deposition

Plasma treatment of a semiconductor surface for enhanced nucleation of a metal-containing layer

In-situ nitridation of high-k dielectrics

Semiconductor device with selectively modulated gate work function

GLOBALFOUNDRIES INC

Threshold voltage control for mixed-type non-planar semiconductor devices

Threshold voltage control for mixed-type non-planar semiconductor devices

Semiconductor device with ferroelectric hafnium oxide and method for forming semiconductor device

Complex circuit element and capacitor utilizing CMOS compatible antiferroelectric high-k materials

Integrated circuits including a MIMCAP device and methods of forming the same for long and controllable reliability lifetime

Semiconductor structure including capacitors having different capacitor dielectrics and method for the formation thereof

Strain retention semiconductor member for channel SiGe layer of pFET

Method for late differential SOI thinning for improved FDSOI performance and HCI optimization

TOKYO ELECTRON LTD

Selective film formation using a self-assembled monolayer

Semiconductor manufacturing platform with in-situ electrical bias and methods thereof

Patterning with self-assembled monolayer

Methods for forming dielectric materials with selected polarization for semiconductor devices

SCHMIDBAUER SVEN

Methods for fabricating integrated circuits with narrow, metal filled openings

TRIYOSO DINA H

Reverse ALD