Inventor

TSUKAMOTO KATSUHIRO

JP46 patents

⚠️ This page may combine multiple inventors who share the name “TSUKAMOTO KATSUHIRO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TSUKAMOTO KATSUHIRO

MITSUBISHI ELECTRIC CORP

Lightly doped MISFET with reduced latchup and punchthrough

Method for forming a thin layer on a semiconductor substrate and apparatus therefor

Apparatus for forming a thin film on surface of semiconductor substrate

PN junction trench isolation type semiconductor device

Method of producing semiconductor device having first and second type field effect transistors

Method of manufacturing semiconductor device with retrograde wells

Method for pretreating semiconductor substrate by photochemically removing native oxide

Method of making a sidewall contact

Semiconductor device with improved element isolation and operation rate

Method of manufacturing a MOS type field effect transistor using an oblique ion implantation step

Semiconductor field effect device having channel stop and channel region formed in a well and manufacturing method therefor

Semiconductor device having first and second type field effect transistors separated by a barrier

Method for forming a thin layer on a semiconductor substrate

Semiconductor memory device having stacked memory capacitors and method for manufacturing the same

Method of making semiconductor integrated circuit having isolation oxide regions with different thickness

Semiconductor device for element isolation and manufacturing method thereof

Semiconductor device with diffusion well isolation

Method for manufacturing semiconductor memory device having stacked memory capacitors

Semiconductor integrated circuit having oxide regions with different thickness

Double diffusion metal-oxide-semiconductor device having shallow source and drain diffused regions

Method for preparing a high mobility, lightly-doped channel mis-type FET with reduced latch up and punchthrough

Method of making a metal-oxide-semiconductor device having shallow source and drain diffused regions

MOS type field effect transistor having LDD structure

CMOS type integrated circuit and a method of producing same

Semiconductor device using a refractory metal as an electrode and interconnection

Method of manufacturing semiconductor capacitive element

Semiconductor memory device having buried structure to suppress soft errors

Semiconductor device and a method of manufacturing the same

Peripheral structure of a chip as a semiconductor device, and manufacturing method thereof

Semiconductor wafer and device structure

Conductive layer connection structure of a semiconductor device and a method of manufacturing thereof

Micro MIS type FET and manufacturing process therefor

Method of manufacturing a semiconductor device

Method of making DRAM cell having improved radiation protection

Manufacturing method for semiconductor memory device having stacked trench capacitors and improved intercell isolation

Micro MIS type FET and manufacturing process therefor

Structure for isolating semiconductor components on an integrated circuit and a method of manufacturing therefor

Semiconductor memory cell capacitor and method for making the same

Method of manufacturing semiconductor memory device

Process for preparing semiconductor device having active base region implanted therein using walled emitter opening and the edge of dielectric isolation zone

Semiconductor memory device and method for making the same

Method of forming a semiconductor device having a capacitor with improved element isolation and operation rate

Manufacturing process for a micro MIS type FET

Method of making a side wall contact with reactive ion etching

Semiconductor memory device

MITSUBISHKI DENKI KABUSHIKI KA

Method of forming a thin film on surface of semiconductor substrate