Inventor
RAO HARI M
US29 patents
⚠️ This page may combine multiple inventors who share the name “RAO HARI M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
RAO HARI M
12 patentsUS8547736B2Oct 1, 2013
Generating a non-reversible state at a bitcell having a first magnetic tunnel junction and a second magnetic tunnel junction
RAO HARI M19 citations92
US8665638B2Mar 4, 2014
MRAM sensing with magnetically annealed reference cell
RAO HARI M9 citations84
US8400822B2Mar 19, 2013
Multi-port non-volatile memory that includes a resistive memory element
RAO HARI M6 citations84
US8320167B2Nov 27, 2012
Programmable write driver for STT-MRAM
RAO HARI M15 citations84
US8254195B2Aug 28, 2012
High-speed sensing for resistive memories
RAO HARI M8 citations84
US8315081B2Nov 20, 2012
Memory cell that includes multiple non-volatile memories
RAO HARI M5 citations73
US8208290B2Jun 26, 2012
System and method to manufacture magnetic random access memory
RAO HARI M6 citations69
US8130535B2Mar 6, 2012
Flexible word-line pulsing for STT-MRAM
RAO HARI M6 citations66
US8488363B2Jul 16, 2013
Write energy conservation in memory
RAO HARI M4 citations62
US8675442B2Mar 18, 2014
Energy efficient memory with reconfigurable decoding
RAO HARI M0 citations52
US8498169B2Jul 30, 2013
Code-based differential charging of bit lines of a sense amplifier
RAO HARI M0 citations52
US8438433B2May 7, 2013
Registers with full scan capability
RAO HARI M0 citations52
QUALCOMM INC
6 patentsUS8867258B2Oct 21, 2014
Memory cell that includes multiple non-volatile memories
QUALCOMM INC34 citations94
US8797792B2Aug 5, 2014
Non-reversible state at a bitcell having a first magnetic tunnel junction and a second magnetic tunnel junction
QUALCOMM INC6 citations83
US9324404B2Apr 26, 2016
MRAM sensing with magnetically annealed reference cell
QUALCOMM INC3 citations73
US9142278B2Sep 22, 2015
Asymmetric write scheme for magnetic bit cell elements
QUALCOMM INC3 citations63
US8787098B2Jul 22, 2014
System and method of reference cell testing
QUALCOMM INC2 citations63
US9135974B2Sep 15, 2015
Multi-port non-volatile memory that includes a resistive memory element
QUALCOMM INC0 citations52
KIM JUNG PILL
6 patentsUS8587982B2Nov 19, 2013
Non-volatile memory array configurable for high performance and high density
KIM JUNG PILL7 citations84
US8446753B2May 21, 2013
Reference cell write operations at a memory
KIM JUNG PILL13 citations84
US8406072B2Mar 26, 2013
System and method of reference cell testing
KIM JUNG PILL10 citations84
US8638596B2Jan 28, 2014
Non-volatile memory saving cell information in a non-volatile memory array
KIM JUNG PILL4 citations73
US8724414B2May 13, 2014
System and method to select a reference cell
KIM JUNG PILL3 citations63
US8208291B2Jun 26, 2012
System and method to control a direction of a current applied to a magnetic tunnel junction
KIM JUNG PILL5 citations63
INTEL CORP
3 patentsUS6629047B1Sep 30, 2003
Method and apparatus for flash voltage detection and lockout
INTEL CORP29 citations92
US6359947B1Mar 19, 2002
Split clock buffers for a negative charge pump
INTEL CORP33 citations92
US6789027B2Sep 7, 2004
Method and apparatus for flash voltage detection and lockout
INTEL CORP12 citations74