Inventor

TEMPLE VICTOR A K

US70 patents

⚠️ This page may combine multiple inventors who share the name “TEMPLE VICTOR A K”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TEMPLE VICTOR A K

GEN ELECTRIC

Semiconductor devices exhibiting minimum on-resistance

Insulated gate semiconductor device with extra short grid and method of fabrication

Method of making high breakdown voltage semiconductor device

Hermetic package having a lead extending through an aperture in the package lid and packaged semiconductor chip

Method of fabricating a field effect semiconductor device having a self-aligned structure

High current hermetic package having a lead extending through the package lid and a packaged semiconductor chip

Method of making symmetrical blocking high voltage breakdown semiconductor device

Method of making an insulated-gate semiconductor device with improved shorting region

Method of reducing the current gain of an inherent bipolar transistor in an insulated-gate semiconductor device and resulting devices

Process for manufacturing insulated-gate semiconductor devices with integral shorts

Processes for manufacturing insulated-gate semiconductor devices with integral shorts

Method of making high breakdown voltage semiconductor device

Batch assembly of high density hermetic packages for power semiconductor chips

MOS protection device

Hermetic semiconductor enclosure

Semiconductor device having turn-on and turn-off capabilities

Insulated-gate semiconductor device with improved base-to-source electrode short and method of fabricating said short

Power semiconductor devices with increased turn-off current ratings and limited current density in peripheral portions

Minimal mask process for manufacturing insulated-gate semiconductor devices with integral shorts

Hermetic package and packaged semiconductor chip having closely spaced leads extending through the package lid

Method of forming a hermetic package having a lead extending through an aperture in the package lid and packaged semiconductor chip

Method of packaging a semiconductor chip in a low inductance package

High switching speed P-N junction devices with recombination means centrally located in high resistivity layer

High breakdown voltage semiconductor device

Hermetic package and packaged semiconductor chip having closely spaced leads extending through the package lid

Symmetrical blocking high voltage breakdown semiconducotr device

Controlled turn-on thyristor

Partially isolated amplifying gate thyristor with controllable dv/dt compensation, high di/dt capability, and high sensitivity

HARRIS CORP

Voltage clamp circuit and method

Semi-conductor chip having interdigitated gate runners with gate bonding pads

Fast turn on switch circuit with parallel MOS controlled thyristor and silicon controlled rectifier

Hermetic package for a high power semiconductor device

Semiconductor devices and methods of assembly thereof

Apparatus and method for increasing breakdown voltage ruggedness in semiconductor devices

Mesh geometry for MOS-gated semiconductor devices

Method of packaging a semiconductor device

Method of forming MOS-gated semiconductor devices having mesh geometry pattern

Device for isolating parallel sub-elements with reverse conducting diode regions

Semiconductor device with a foil-sealed lid

Semiconductor package and method with vertically extended electrode leads

Package for parallel subelement semiconductor devices

Semiconductor device with improved turn-off capability

ELECTRIC POWER RES INST

Self-protection against breakover turn-on failure in thyristors through selective base lifetime control

Thyristor with voltage breakover current control separated from main emitter by current limit region

Thyristor device with self-protection against breakover turn-on failure

Package for radiation triggered semiconductor device and method

Multigate light fired thyristor and method

Multiple gated light fired thyristor with non-critical light pipe coupling

INTERSIL CORP

Hermetic thin pack semiconductor device

Flat power pack