Inventor
AYOTTE STEPHEN P
US32 patents
⚠️ This page may combine multiple inventors who share the name “AYOTTE STEPHEN P”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
18 patentsUS8987010B1Mar 24, 2015
Microprocessor image correction and method for the detection of potential defects
IBM10 citations79
US10601404B2Mar 24, 2020
Contactless readable programmable transponder to monitor chip join
IBM2 citations73
US10200016B2Feb 5, 2019
Contactless readable programmable transponder to monitor chip join
IBM3 citations73
US9876487B2Jan 23, 2018
Contactless readable programmable transponder to monitor chip join
IBM2 citations73
US8829674B2Sep 9, 2014
Stacked multi-chip package and method of making same
IBM4 citations73
US9704830B1Jul 11, 2017
Semiconductor structure and method of making
IBM2 citations72
US9190375B2Nov 17, 2015
Solder bump reflow by induction heating
IBM6 citations69
US9230921B2Jan 5, 2016
Self-healing crack stop structure
IBM4 citations66
US7939390B2May 10, 2011
Gap capacitors for monitoring stress in solder balls in flip chip technology
IBM3 citations63
US7709876B2May 4, 2010
Gap capacitors for monitoring stress in solder balls in flip chip technology
IBM4 citations63
US11075619B2Jul 27, 2021
Contactless readable programmable transponder to monitor chip join
IBM0 citations62
US9222707B2Dec 29, 2015
Temperature stabilization in semiconductors using the magnetocaloric effect
IBM3 citations60
US10309884B2Jun 4, 2019
Predicting semiconductor package warpage
IBM1 citations57
US10050012B2Aug 14, 2018
Method for semiconductor die removal rework
IBM0 citations51
US9772268B2Sep 26, 2017
Predicting semiconductor package warpage
IBM0 citations47
US9645573B2May 9, 2017
Reliability monitor test strategy definition
IBM0 citations42
US7745256B2Jun 29, 2010
Rectangular-shaped controlled collapse chip connection
IBM0 citations41
US9177931B2Nov 3, 2015
Reducing thermal energy transfer during chip-join processing
IBM0 citations37
GLOBALFOUNDRIES INC
8 patentsUS9508680B1Nov 29, 2016
Induction heating for underfill removal and chip rework
GLOBALFOUNDRIES INC28 citations93
US9776270B2Oct 3, 2017
Chip joining by induction heating
GLOBALFOUNDRIES INC7 citations84
US9472490B1Oct 18, 2016
IC structure with recessed solder bump area and methods of forming same
GLOBALFOUNDRIES INC18 citations84
US10245667B2Apr 2, 2019
Chip joining by induction heating
GLOBALFOUNDRIES INC3 citations73
US9711422B2Jul 18, 2017
Visually detecting electrostatic discharge events
GLOBALFOUNDRIES INC4 citations71
US9548275B2Jan 17, 2017
Detecting sudden changes in acceleration in semiconductor device or semiconductor packaging containing semiconductor device
GLOBALFOUNDRIES INC4 citations71
US10256204B2Apr 9, 2019
Separation of integrated circuit structure from adjacent chip
GLOBALFOUNDRIES INC0 citations52
US10429414B2Oct 1, 2019
Multiple contact probe head disassembly method and system
GLOBALFOUNDRIES INC0 citations45
AYOTTE STEPHEN P
5 patentsUS8765593B2Jul 1, 2014
Controlled collapse chip connection (C4) structure and methods of forming
AYOTTE STEPHEN P2 citations61
US9105573B2Aug 11, 2015
Visually detecting electrostatic discharge events
AYOTTE STEPHEN P2 citations59
US8230903B2Jul 31, 2012
Low profile heat sink for semiconductor devices
AYOTTE STEPHEN P2 citations55
US9059097B2Jun 16, 2015
Inhibiting propagation of imperfections in semiconductor devices
AYOTTE STEPHEN P1 citations49
US8426856B2Apr 23, 2013
Thermally sensitive material embedded in the substrate
AYOTTE STEPHEN P1 citations47