Inventor
MA ALBERT
US14 patents
⚠️ This page may combine multiple inventors who share the name “MA ALBERT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MARVELL ASIA PTE LTD
7 patentsUS12032488B1Jul 9, 2024
Circuit and method for translation lookaside buffer (TLB) implementation
MARVELL ASIA PTE LTD4 citations71
US11416405B1Aug 16, 2022
System and method for mapping memory addresses to locations in set-associative caches
MARVELL ASIA PTE LTD4 citations71
US11620225B1Apr 4, 2023
System and method for mapping memory addresses to locations in set-associative caches
MARVELL ASIA PTE LTD0 citations60
US12541466B1Feb 3, 2026
Circuit and method for translation lookaside buffer (TLB) implementation
MARVELL ASIA PTE LTD0 citations59
US12282658B1Apr 22, 2025
System and method for large memory transaction (LMT) stores
MARVELL ASIA PTE LTD0 citations59
US11960727B1Apr 16, 2024
System and method for large memory transaction (LMT) stores
MARVELL ASIA PTE LTD1 citations59
US11474953B2Oct 18, 2022
Configuration cache for the ARM SMMUv3
MARVELL ASIA PTE LTD0 citations48
CAVIUM INC
4 patentsUS9405702B2Aug 2, 2016
Caching TLB translations using a unified page table walker cache
CAVIUM INC9 citations82
US9910776B2Mar 6, 2018
Instruction ordering for in-progress operations
CAVIUM INC0 citations50
US9678717B2Jun 13, 2017
Distributing resource requests in a computing system
CAVIUM INC0 citations46
US10078601B2Sep 18, 2018
Approach for interfacing a pipeline with two or more interfaces in a processor
CAVIUM INC0 citations38