Inventor

POTASH HANAN

US31 patents

⚠️ This page may combine multiple inventors who share the name “POTASH HANAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

POTASH HANAN

BURROUGHS CORP

Branch predicting computer

Flexible computer architecture using arrays of standardized microprocessors customized for pipeline and parallel operations

Address translation buffer

Method of transforming high level language statements into multiple lower level language instruction sets

Method of operating a bus in a data processing system via a repetitive three stage signal sequence

Digital computer having programmable structure

Buffered handshake bus with transmission and response counters for avoiding receiver overflow

Digital device with interconnect matrix

Digital device for time-multiplexing multiple tasks

Circuit for addressing binarily addressable memories with BCD addresses

POTASH HANAN

Computing device with resource manager and civilware tier

Computing device with frames/bins structure, mentor layer and plural operand processing

Electronic computer-aided design tool

Processor that uses plural form information

Electronic computer-aided design tool

Enhanced security computer processor with mentor circuits

Computer processor with operand/variable-mapped namespace

Processor with frames/bins structure in local high speed memory

Processor with logical mentor

DISCOVERY PARTNERS INTERNAT

Solid support matrices with memories and combinatorial libraries therefrom

Method for tagging and screening molecules

Automated sorting system for matrices with memory

IRORI

Matrices with memories and uses thereof

Matrices with memories and uses thereof

Matrices with memories and uses thereof

SCIENT COMPUTER SYSTEMS CORP

Bi-directional databus system for supporting superposition of vector and scalar operations in a computer

Backplane structure for a computer superpositioning scalar and vector operations

Linking scalar results directly to scalar operation inputs on a bidirectional databus in a computer which superpositions vector and scalar operations

UNISYS CORP

Digital computer having an interconnect mechanism stacked above a semiconductor substrate

Digital computer having control and arithmetic sections stacked above semiconductor substrate

DISCOVERY PARTNERS INTERNATION

Matrices with memories