Inventor

MACHIDA HIROHISA

JP23 patents

⚠️ This page may combine multiple inventors who share the name “MACHIDA HIROHISA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MACHIDA HIROHISA

MITSUBISHI ELECTRIC CORP

Content addressable memory cell and content addressable memory circuit for implementing a least recently used algorithm

Processor using implicit register addressing

Hardware implemented multiplier for performing multiplication of two digital data according to booth algorithm

Register window system for reducing the need for overflow-write by prewriting registers to memory during times without bus contention

Digital signal processor with addressable and shifting memory

Adaptive equalizer and designing method thereof

Resampling method and resampler circuit

Associative memory circuit and TLB circuit

Periodic signal generator circuit

Arithmetic and logic unit with prior state dependent logic operations

Method for generating an object code for a pipeline computer process to reduce swapping instruction set

Processor circuit for heapsorting

Data sorting apparatus capable of detecting completion of data sorting early and sorting method therefor

Standard cells interconnection structure including a modified standard cell

Associative memory system for performing hit judgment on cache data

Address translator having a high speed data comparator

Digital signal decoding method and circuit therefor

Improved data comparator for comparing plural-bit data at higher speed

Semiconductor memory device storing two types of binary number data and method of operating the same

Communication control processor

Terminal equipment identifier control circuit

Viterbi decoder and synchronism controlling method

RENESAS ELECTRONICS CORP

Standard cell and semiconductor device