P

Inventor

ROSSKOPF VALENTIN

DE12 patents

Patents

12 patents
US6930324B2Aug 16, 2005

Device architecture and process for improved vertical memory arrays

INFINEON TECHNOLOGIES AG99 citations96
US6853000B2Feb 8, 2005

Test structure for determining a doping region of an electrode connection between a trench capacitor and a selection transistor in a memory cell array

INFINEON TECHNOLOGIES AG7 citations72
US6838724B2Jan 4, 2005

Transistor array and semiconductor memory configuration fabricated with the transistor array

INFINEON TECHNOLOGIES AG9 citations72
US6529031B2Mar 4, 2003

Integrated circuit configuration for testing transistors, and a semiconductor wafer having such a circuit configuration

INFINEON TECHNOLOGIES AG7 citations72
US7372072B2May 13, 2008

Semiconductor wafer with test structure

INFINEON TECHNOLOGIES AG8 citations66
US6897077B2May 24, 2005

Test structure for determining a short circuit between trench capacitors in a memory cell array

INFINEON TECHNOLOGIES AG2 citations61
US6856562B2Feb 15, 2005

Test structure for measuring a junction resistance in a DRAM memory cell array

INFINEON TECHNOLOGIES AG3 citations58
US6484307B2Nov 19, 2002

Method for fabricating and checking structures of electronic circuits in a semiconductor substrate

INFINEON TECHNOLOGIES AG3 citations57
US7205567B2Apr 17, 2007

Semiconductor product having a semiconductor substrate and a test structure and method

INFINEON TECHNOLOGIES AG1 citations48
US6656647B2Dec 2, 2003

Method for examining structures on a wafer

INFINEON TECHNOLOGIES AG1 citations45
US6930325B2Aug 16, 2005

Test structure for improved vertical memory arrays

INFINEON TECHNOLOGIES AG0 citations40
US6878965B2Apr 12, 2005

Test structure for determining a region of a deep trench outdiffusion in a memory cell array

INFINEON TECHNOLOGIES AG0 citations40