Inventor
BRITTON BARRY K
US22 patents
⚠️ This page may combine multiple inventors who share the name “BRITTON BARRY K”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
LUCENT TECHNOLOGIES INC
8 patentsUS6216191B1Apr 10, 2001
Field programmable gate array having a dedicated processor interface
LUCENT TECHNOLOGIES INC57 citations95
US6043677AMar 28, 2000
Programmable clock manager for a programmable logic device that can implement delay-locked loop functions
LUCENT TECHNOLOGIES INC62 citations95
US6020755AFeb 1, 2000
Hybrid programmable gate arrays
LUCENT TECHNOLOGIES INC187 citations95
US6028463AFeb 22, 2000
Programmable clock manager for a programmable logic device that can generate at least two different output clocks
LUCENT TECHNOLOGIES INC28 citations92
US6064225AMay 16, 2000
Global signal distribution with reduced routing tracks in an FPGA
LUCENT TECHNOLOGIES INC46 citations91
US6049224AApr 11, 2000
Programmable logic device with logic cells having a flexible input structure
LUCENT TECHNOLOGIES INC8 citations72
US5623217AApr 22, 1997
Field programmable gate array with write-port enabled memory
LUCENT TECHNOLOGIES INC11 citations72
US5986471ANov 16, 1999
Bi-directional buffers and supplemental logic and interconnect cells for programmable logic devices
LUCENT TECHNOLOGIES INC4 citations60
AT & T CORP
6 patentsUS5394031AFeb 28, 1995
Apparatus and method to improve programming speed of field programmable gate arrays
AT & T CORP81 citations96
US5386156AJan 31, 1995
Programmable function unit with programmable fast ripple logic
AT & T CORP86 citations96
US5396126AMar 7, 1995
FPGA with distributed switch matrix
AT & T CORP99 citations95
US5381058AJan 10, 1995
FPGA having PFU with programmable output driver inputs
AT & T CORP66 citations95
US5384497AJan 24, 1995
Low-skew signal routing in a programmable array
AT & T CORP27 citations92
US5528170AJun 18, 1996
Low-skew signal routing in a programmable array
AT & T CORP9 citations73
LATTICE SEMICONDUCTOR CORP
4 patentsUS6472904B2Oct 29, 2002
Double data rate input and output in a programmable logic device
LATTICE SEMICONDUCTOR CORP71 citations96
US7034596B2Apr 25, 2006
Adaptive input logic for phase adjustments
LATTICE SEMICONDUCTOR CORP20 citations92
US6483342B2Nov 19, 2002
Multi-master multi-slave system bus in a field programmable gate array (FPGA)
LATTICE SEMICONDUCTOR CORP78 citations92
US7262630B1Aug 28, 2007
Programmable termination for single-ended and differential schemes
LATTICE SEMICONDUCTOR CORP11 citations84