Inventor
KNEBEL PATRICK
US24 patents
⚠️ This page may combine multiple inventors who share the name “KNEBEL PATRICK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
HEWLETT PACKARD DEVELOPMENT CO
13 patentsUS7343479B2Mar 11, 2008
Method and apparatus for implementing two architectures in a chip
HEWLETT PACKARD DEVELOPMENT CO18 citations92
US6820190B1Nov 16, 2004
Method and computer system for decomposing macroinstructions into microinstructions and forcing the parallel issue of at least two microinstructions
HEWLETT PACKARD DEVELOPMENT CO29 citations92
US6681322B1Jan 20, 2004
Method and apparatus for emulating an instruction set extension in a digital computer system
HEWLETT PACKARD DEVELOPMENT CO24 citations92
US7139936B2Nov 21, 2006
Method and apparatus for verifying the correctness of a processor behavioral model
HEWLETT PACKARD DEVELOPMENT CO16 citations90
US6625759B1Sep 23, 2003
Method and apparatus for verifying the fine-grained correctness of a behavioral model of a central processor unit
HEWLETT PACKARD DEVELOPMENT CO22 citations90
US6643800B1Nov 4, 2003
Method and apparatus for testing microarchitectural features by using tests written in microcode
HEWLETT PACKARD DEVELOPMENT CO18 citations81
US6807625B1Oct 19, 2004
Method and apparatus for efficiently generating, storing, and consuming arithmetic flags between producing and consuming macroinstructions when emulating with microinstructions
HEWLETT PACKARD DEVELOPMENT CO7 citations74
US6745322B1Jun 1, 2004
Apparatus and method for conditionally flushing a pipeline upon a failure of a test condition
HEWLETT PACKARD DEVELOPMENT CO12 citations74
US6618801B1Sep 9, 2003
Method and apparatus for implementing two architectures in a chip using bundles that contain microinstructions and template information
HEWLETT PACKARD DEVELOPMENT CO10 citations73
US6542862B1Apr 1, 2003
Determining register dependency in multiple architecture systems
HEWLETT PACKARD DEVELOPMENT CO10 citations73
US7941610B2May 10, 2011
Coherency directory updating in a multiprocessor computing system
HEWLETT PACKARD DEVELOPMENT CO2 citations62
US6668315B1Dec 23, 2003
Methods and apparatus for exchanging the contents of registers
HEWLETT PACKARD DEVELOPMENT CO1 citations52
US7600079B2Oct 6, 2009
Performing a memory write of a data unit without changing ownership of the data unit
HEWLETT PACKARD DEVELOPMENT CO0 citations50
HEWLETT PACKARD CO
6 patentsUS6003107ADec 14, 1999
Circuitry for providing external access to signals that are internal to an integrated circuit chip package
HEWLETT PACKARD CO98 citations97
US5867644AFeb 2, 1999
System and method for on-chip debug support and performance monitoring in a microprocessor
HEWLETT PACKARD CO124 citations97
US5412787AMay 2, 1995
Two-level TLB having the second level TLB implemented in cache tag RAMs
HEWLETT PACKARD CO61 citations91
US5860096AJan 12, 1999
Multi-level instruction cache for a computer
HEWLETT PACKARD CO15 citations72
US5526500AJun 11, 1996
System for operand bypassing to allow a one and one-half cycle cache memory access time for sequential load and branch instructions
HEWLETT PACKARD CO12 citations68
US5829049AOct 27, 1998
Simultaneous execution of two memory reference instructions with only one address calculation
HEWLETT PACKARD CO6 citations58