P

Inventor

IGARASHI MUTSUNORI

JP22 patents

Patents

22 patents
US6645842B2Nov 11, 2003

Semiconductor integrated circuit device, semiconductor integrated circuit wiring method, and cell arranging method

TOSHIBA KK125 citations99
US6436804B2Aug 20, 2002

Semiconductor integrated circuit device, semiconductor integrated circuit wiring method, and cell arranging method

TOSHIBA KK138 citations99
US6262487B1Jul 17, 2001

Semiconductor integrated circuit device, semiconductor integrated circuit wiring method, and cell arranging method

TOSHIBA KK452 citations99
US6792593B2Sep 14, 2004

Pattern correction method, apparatus, and program

TOSHIBA KK225 citations98
US6546540B1Apr 8, 2003

Method of automatic layout design for LSI, mask set and semiconductor integrated circuit manufactured by automatic layout design method, and recording medium storing automatic layout design program

TOSHIBA KK157 citations98
US6813756B2Nov 2, 2004

Method of automatic layout design for LSI, mask set and semiconductor integrated circuit manufactured by automatic layout design method, and recording medium storing automatic layout design program

TOSHIBA KK46 citations96
US6779167B2Aug 17, 2004

Automated wiring pattern layout method

TOSHIBA KK44 citations96
US5224057AJun 29, 1993

Arrangement method for logic cells in semiconductor IC device

TOSHIBA KK304 citations94
US6904572B2Jun 7, 2005

Method, apparatus and program for designing a semiconductor integrated circuit by adjusting loading of paths

TOSHIBA KK23 citations92
US6763508B2Jul 13, 2004

Layout design system, layout design method and layout design program of semiconductor integrated circuit, and method of manufacturing the same

TOSHIBA KK30 citations92
US6459331B1Oct 1, 2002

Noise suppression circuit, ASIC, navigation apparatus communication circuit, and communication apparatus having the same

TOSHIBA KK26 citations92
US5801960ASep 1, 1998

Layout method of wiring pattern for semiconductor integrated circuit

TOSHIBA KK53 citations92
US5397749AMar 14, 1995

Method for arranging logical cells in a semiconductor integrated circuit

TOSHIBA KK47 citations92
US7539952B2May 26, 2009

Computer implemented design system, a computer implemented design method, a reticle set, and an integrated circuit

TOSHIBA KK9 citations84
US7013444B2Mar 14, 2006

Layout design system, layout design method and layout design program of semiconductor integrated circuit, and method of manufacturing the same

TOSHIBA KK12 citations84
US5986961ANov 16, 1999

Semiconductor integrated circuit of low power consumption type

TOSHIBA KK17 citations84
US6097043AAug 1, 2000

Semiconductor integrated circuit and supply method for supplying multiple supply voltages in a semiconductor integrated circuit

TOSHIBA KK17 citations83
US7127694B2Oct 24, 2006

Computer implemented design system, a computer implemented design method, a reticle set, and an integrated circuit

TOSHIBA KK10 citations74
US7124389B2Oct 17, 2006

Automated wiring pattern layout method

TOSHIBA KK8 citations73
US7064691B2Jun 20, 2006

Noise suppression circuit, ASIC, navigation apparatus, communication circuit, and communication apparatus having the same

TOSHIBA KK6 citations73
US6683336B1Jan 27, 2004

Semiconductor integrated circuit, supply method for supplying multiple supply voltages in semiconductor integrated circuit, and record medium for storing program of supply method for supplying multiple supply voltages in semiconductor integrated circuit

TOSHIBA KK2 citations62
US7230554B2Jun 12, 2007

Noise suppression circuit, ASIC, navigation apparatus, communication circuit, and communication apparatus having the same

TOSHIBA KK1 citations51