Inventor

SONNIER DAVID P

US54 patents

⚠️ This page may combine multiple inventors who share the name “SONNIER DAVID P”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SONNIER DAVID P

AGERE SYSTEMS INC

Virtual reassembly system and method of operation thereof

Method and apparatus for providing multiple data class differentiation with priorities using a single scheduling structure

Processor architecture and a method of processing

Methods and apparatus for forming linked list queue using chunk-based structure

Voice packet processor and method of operation thereof

Methods and apparatus for performing in-service upgrade of software in network processor

Methods and apparatus for controlling latency variation in a packet transfer network

Processor with table-based scheduling using software-controlled interval computation

Processor with software-controlled programmable service levels

Methods and apparatus for updating data structures during in-service upgrade of software in network processor

Processor with scheduler architecture supporting multiple distinct scheduling algorithms

Virtual reassembly system and method of operation thereof

Virtual segmentation system and method of operation thereof

Processor with dynamic table-based scheduling using linked transmission elements for handling transmission request collisions

Processor with dynamic table-based scheduling using multi-entry table locations for handling transmission request collisions

Virtual segmentation system and method of operation thereof

Processor architecture and a method of processing

Fast pattern processor including a function interface system

Function interface system and method of processing issued functions between co-processors

Method for implementing dual link list structure to enable fast link-list pointer updates

Memory system for increased bandwidth

Method and apparatus for switching between active and standby switch fabrics with no loss of data

Multi-protocol bus system and method of operation thereof

Multi-protocol bus system and method of operation thereof

Method and apparatus for buffer partitioning without loss of data

Traffic management using in-band flow control and multiple-rate traffic shaping

Processing device peripheral with integral network interface circuitry

TANDEM COMPUTERS INC

Detecting and isolating errors occurring in data communication in a multiple processor system

Method of management of a circular queue for asynchronous access

Storage access validation to data messages using partial storage address data indexed entries containing permissible address range validation for message source

Fail-fast, fail-functional, fault-tolerant multiprocessor system

Routing arbitration for shared resources

Synchronized data transmission between elements of a processing system

Method and apparatus for configuring routing paths of a network communicatively interconnecting a number of processing elements

Latency reduction and routing arbitration for network message routers

System for switching power and scrubbing power mixing devices for faults

Spoon-feed initialization in a multiprocessor system

SONNIER DAVID P

Network communications processor architecture with memory load balancing

Task queuing in a network communications processor architecture

Data caching in a network communications processor architecture

Network communications processor architecture

Data caching in a network communications processor architecture

Network based data traffic detection and control

COMPAQ COMPUTER CORP

Self-checked, lock step processor pairs

HAMILTON CHRISTOPHER W

Flexible traffic management and shaping processing for multimedia distribution

SUNDARARAMAN BALAKRISHNAN

Multicasting traffic manager in a network communications processor architecture

BROWN DAVID A

Yield-enhancing device failure analysis

CLUNE DAVID E

Method and apparatus for maintaining multicast lists in a data network

LUCENT TECHNOLOGIES INC

Head of line blockage avoidance system and method of operation thereof

HEWLETT PACKARD DEVELOPMENT CO

Transpose table biased arbitration scheme