Inventor
HSIEH BING-YU
TW16 patents
⚠️ This page may combine multiple inventors who share the name “HSIEH BING-YU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MEDIATEK INC
12 patentsUS8031007B2Oct 4, 2011
Error protection method, TDC module, CTDC module, all-digital phase-locked loop, and calibration method thereof
MEDIATEK INC23 citations92
US8031008B2Oct 4, 2011
PLL with loop bandwidth calibration circuit
MEDIATEK INC29 citations92
US7791428B2Sep 7, 2010
All-digital phase-locked loop, loop bandwidth calibration method, and loop gain calibration method for the same
MEDIATEK INC19 citations92
US7474235B2Jan 6, 2009
Automatic power control system for optical disc drive and method thereof
MEDIATEK INC20 citations92
US7295073B2Nov 13, 2007
Automatic gain control apparatus
MEDIATEK INC23 citations91
US7903006B2Mar 8, 2011
Automatic power control system for optical disc drive and method thereof
MEDIATEK INC4 citations62
US7697380B2Apr 13, 2010
Apparatus for detecting the wobble carrier frequency of an optical disk and method for same
MEDIATEK INC5 citations62
US7693011B2Apr 6, 2010
Wobble detection circuit and method for processing wobble signals
MEDIATEK INC5 citations62
US7339405B2Mar 4, 2008
Clock rate adjustment apparatus and method for adjusting clock rate
MEDIATEK INC2 citations62
US7693012B2Apr 6, 2010
Apparatus for demodulating address in pre-groove symbols and apparatus for decoding pre-pit symbols
MEDIATEK INC2 citations60
US7613093B2Nov 3, 2009
Duty ratio control apparatus for pre-pit detection or header detection of an optical storage medium
MEDIATEK INC1 citations52
US7697399B2Apr 13, 2010
Power control system and related method
MEDIATEK INC0 citations51
CHANG HSIANG-HUI
3 patentsUS8429487B2Apr 23, 2013
Error protection method, TDC module, CTDC module, all-digital phase-locked loop, and calibration method thereof
CHANG HSIANG-HUI8 citations83
US8395453B2Mar 12, 2013
Error compensation method, digital phase error cancellation module, and ADPLL thereof
CHANG HSIANG-HUI8 citations83
US8228128B2Jul 24, 2012
All-digital phase-locked loop, loop bandwidth calibration method, and loop gain calibration method for the same
CHANG HSIANG-HUI4 citations73