Inventor

STEELE JR GUY L

US79 patents

⚠️ This page may combine multiple inventors who share the name “STEELE JR GUY L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

STEELE JR GUY L

SUN MICROSYSTEMS INC

Lock free reference counting

Lock-free implementation of concurrent shared object with dynamic node allocation and distinguishing pointer value

Bounded-pause time garbage collection system and method including write barrier associated with a source instance of a partially relocated object

Bounded-pause time garbage collection system and method including write barrier associated with source and target instances of a partially relocated object

Concurrent shared object implemented using a linked-list with amortized node allocation

System and method for floating-computation for numbers in delimited floating point representation

System and method for floating-point computation for numbers in delimited floating point representation

System and method for space and time efficient object locking

Non-hypercube interconnection subsystem having a subset of nodes interconnected using polygonal topology and other nodes connect to the nodes in the subset

Floating point remainder with embedded status information

Shared synchronized skip-list data structure and technique employing linearizable operations

Floating point system with improved support of interval arithmetic

Maintaining a double-ended queue as a linked-list with sentinel nodes and delete flags with concurrent non-blocking insert and remove operations using a double compare-and-swap primitive

Selective signalling of later reserve location memory fault in compound compare and swap

System and method for arranging bits of a data word in accordance with a mask

System and method for performing generalized operations in connection with bits units of a data word

Interconnection subsystem for interconnecting a predetermined number of nodes to form an elongated brick-like non-square rectangular topology

Digital data process system including efficient arrangement to support branching within trap shadows

Digital data processing system including efficient arrangement to support branching within trap shadows

System and method for assisting exact Garbage collection by segregating the contents of a stack into sub stacks

Dynamic generation of deadlock-free routings

System and method for rearranging bits of a data word in accordance with a mask using sorting

Network reconfiguration

Network topologies

Maintaining a double-ended queue in a contiguous array with concurrent non-blocking insert and remove operations using a double compare-and-swap primitive

Floating point system that represents status flag information within a floating point operand

System and method for arranging bits of a data word in accordance with a mask

Deadlock-free routing

Recursive partitioning of networks

Circuit for selectively providing maximum or minimum of a pair of floating point operands

Total order comparator unit for comparing values of two floating point operands

Floating point unit for detecting and representing inexact computations without flags or traps

System and method for unpacking and merging bits of a data world in accordance with bits of a mask word

System and method for floating-point computation

System and method for floating-point computation

Interconnection subsystem for interconnecting a predetermined number of nodes to form a Moebius strip topology

ORACLE INT CORP

Systems and methods for implementing dynamically configurable perfect hash tables

Systems and methods for rapidly generating suitable pairs of hash functions

Sparse and data-parallel inference method and system for the latent Dirichlet allocation model

Systems and methods for generating bit matrices for hash functions using fast filtering

Systems and methods for implementing work stealing using a configurable separation of stealable and non-stealable work items

Systems and methods for implementing low-latency lookup circuits using multiple hash functions

Method and system for latent dirichlet allocation computation using approximate counters

THINKING MACHINES CORP

Method and apparatus for routing message packets

Method and apparatus for simulating m-dimension connection networks in and n-dimension network where m is less than n

Method and apparatus for routing message packets and recording the roofing sequence

Virtual processor techniques in a SIMD multiprocessor array

STEELE JR GUY L

Comparator unit for comparing values of floating point operands

Circuit for selectively providing maximum or minimum of a pair of floating point operands

SUN MICRO SYSTEMS INC

System and method using partial trap barrier instruction to provide trap barrier class-based selective stall of instruction processing pipeline